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Wed, 10 Jul 2013 21:06:39 +0900 (KST) Received: from padma-linuxpc.sisodomain.com ([107.108.83.35]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MPP0018RYYV9N30@mmp2.samsung.com>; Wed, 10 Jul 2013 21:06:39 +0900 (KST) From: Padmavathi Venna To: linux-samsung-soc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, alsa-devel@alsa-project.org, padma.v@samsung.com, padma.kvr@gmail.com Subject: [PATCH 1/4] clk: exynos-audss: add support for Exynos 5420 Date: Wed, 10 Jul 2013 17:41:50 +0530 Message-id: <1373458313-18970-2-git-send-email-padma.v@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1373458313-18970-1-git-send-email-padma.v@samsung.com> References: <1373458313-18970-1-git-send-email-padma.v@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrIIsWRmVeSWpSXmKPExsWyRsSkWtff726gwZT3phYr3/9ltLhy8RCT xdSHT9gsDsx+yGpxdtlBNoveBVfZLDY9vsZqMeP8PiaLpxMuslm0L5vDavH75nc2i4srvjA5 8Hhs+NzE5jG74SKLx85Zd9k9Nq3qZPO4c20Pm8fmJfUe52csZPTo27KK0ePzJrkAzigum5TU nMyy1CJ9uwSujJ7jAgUrJSrWf3rJ2sC4S6SLkYNDQsBEYv1Xji5GTiBTTOLCvfVsXYxcHEIC Sxkleq++ZYRImEgsf3oYKjGdUaJ1znJ2CKeHSeL9mlZGkElsAjoSLWddQBpEBHYDdV+0AKlh FuhklOg7dYQNJCEs4Cxx+vg6dhCbRUBV4uaT72BxXqD49r75bBDbFCSOTf3KCmJzCrhI/GuF uEIIqGbip+lgiyUEbrFLPP+4hQ1ikIDEt8mHWCDekZXYdIAZYo6kxMEVN1gmMAovYGRYxSia WpBcUJyUXmSoV5yYW1yal66XnJ+7iREYPaf/PevdwXj7gPUhxmSgcROZpUST84HRl1cSb2hs ZmRhamJqbGRuaUaasJI4r1qLdaCQQHpiSWp2ampBalF8UWlOavEhRiYOTqkGRh15qX3/9Kom TE7nc1+yqnfj3F9xc3wbQz8e4E2Yd1Mlnk+bw+HPT7d1uW8iVYobe05uUe2cdmyGmZqWpDDb JnvbO+v/BPVI6q902WJ72m76jsex+bMOvsp6MLMzVaVhX1uYKstNGWH+cxIBcUulWOaqBeSv s4lm3nH79Oklp/54XHs1iTMnVomlOCPRUIu5qDgRAIl0B9C0AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPIsWRmVeSWpSXmKPExsVy+t9jQV1/v7uBBvMm6FisfP+X0eLKxUNM FlMfPmGzODD7IavF2WUH2Sx6F1xls9j0+BqrxYzz+5gsnk64yGbRvmwOq8Xvm9/ZLC6u+MLk wOOx4XMTm8fshossHjtn3WX32LSqk83jzrU9bB6bl9R7nJ+xkNGjb8sqRo/Pm+QCOKMaGG0y UhNTUosUUvOS81My89JtlbyD453jTc0MDHUNLS3MlRTyEnNTbZVcfAJ03TJzgG5WUihLzCkF CgUkFhcr6dthmhAa4qZrAdMYoesbEgTXY2SABhLWMGb0HBcoWClRsf7TS9YGxl0iXYycHBIC JhLLnx5mg7DFJC7cWw9kc3EICUxnlGids5wdwulhkni/ppWxi5GDg01AR6LlrAtIg4jAbkaJ 3osWIDXMAp2MEn2njoBNEhZwljh9fB07iM0ioCpx88l3sDgvUHx733yobQoSx6Z+ZQWxOQVc JP61vmUEsYWAaiZ+ms4+gZF3ASPDKkbR1ILkguKk9FwjveLE3OLSvHS95PzcTYzg6HwmvYNx VYPFIUYBDkYlHt4DCncChVgTy4orcw8xSnAwK4nwqlvdDRTiTUmsrEotyo8vKs1JLT7EmAx0 1URmKdHkfGDiyCuJNzQ2MTc1NrU0sTAxsyRNWEmc92CrdaCQQHpiSWp2ampBahHMFiYOTqkG RuPkROeK5+972adVBXx0M9nR8G/hv+vNhoLBxW0RSy62JopaBHw63VKzVSUuL7/nxJxEq7ev 1qgvXr32hOUs4bgJGSUxAqeEt9ypzFed9Czl2ATRVYHvVrZJLlOKO8ex/6Ynj/Def51TQv6/ eWi199WfqGftD1wTdx5wXJzUsfZkuOem7D9x15VYijMSDbWYi4oTATasKPISAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130710_080722_779959_DFA6309C X-CRM114-Status: UNSURE ( 8.78 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.2 (-------) Cc: kgene.kim@samsung.com, mturquette@linaro.org, sbkim73@samsung.com, dianders@chromium.org, abrestic@chromium.org, broonie@kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Andrew Bresticker The AudioSS block on Exynos 5420 has an additional clock gate for the ADMA bus clock. Signed-off-by: Andrew Bresticker Reviewed-on: https://gerrit.chromium.org/gerrit/57711 Reviewed-by: Simon Glass --- .../devicetree/bindings/clock/clk-exynos-audss.txt | 7 +++++-- drivers/clk/samsung/clk-exynos-audss.c | 8 ++++++++ include/dt-bindings/clk/exynos-audss-clk.h | 3 ++- 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt index a120180..3115930 100644 --- a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt +++ b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt @@ -8,8 +8,10 @@ Required Properties: - compatible: should be one of the following: - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs. - - "samsung,exynos5250-audss-clock" - controller compatible with all Exynos5 SoCs. - + - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250 + SoCs. + - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420 + SoCs. - reg: physical base address and length of the controller's register set. - #clock-cells: should be 1. @@ -34,6 +36,7 @@ i2s_bus 6 sclk_i2s 7 pcm_bus 8 sclk_pcm 9 +adma 10 Exynos5420 Example 1: An example of a clock controller node is listed below. diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index 9b1bbd5..86d2606 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -121,6 +121,12 @@ void __init exynos_audss_clk_init(struct device_node *np) "div_pcm0", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 5, 0, &lock); + if (of_device_is_compatible(np, "samsung,exynos5420-audss-clock")) { + clk_table[EXYNOS_ADMA] = clk_register_gate(NULL, "adma", + "dout_srp", CLK_SET_RATE_PARENT, + reg_base + ASS_CLK_GATE, 9, 0, &lock); + } + #ifdef CONFIG_PM_SLEEP register_syscore_ops(&exynos_audss_clk_syscore_ops); #endif @@ -131,3 +137,5 @@ CLK_OF_DECLARE(exynos4210_audss_clk, "samsung,exynos4210-audss-clock", exynos_audss_clk_init); CLK_OF_DECLARE(exynos5250_audss_clk, "samsung,exynos5250-audss-clock", exynos_audss_clk_init); +CLK_OF_DECLARE(exynos5420_audss_clk, "samsung,exynos5420-audss-clock", + exynos_audss_clk_init); diff --git a/include/dt-bindings/clk/exynos-audss-clk.h b/include/dt-bindings/clk/exynos-audss-clk.h index 8279f42..0ae6f5a 100644 --- a/include/dt-bindings/clk/exynos-audss-clk.h +++ b/include/dt-bindings/clk/exynos-audss-clk.h @@ -19,7 +19,8 @@ #define EXYNOS_SCLK_I2S 7 #define EXYNOS_PCM_BUS 8 #define EXYNOS_SCLK_PCM 9 +#define EXYNOS_ADMA 10 -#define EXYNOS_AUDSS_MAX_CLKS 10 +#define EXYNOS_AUDSS_MAX_CLKS 11 #endif