From patchwork Tue Jul 16 22:33:59 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 2828341 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5D933C0AB2 for ; Tue, 16 Jul 2013 22:34:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 68D5320220 for ; Tue, 16 Jul 2013 22:34:35 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3421220214 for ; Tue, 16 Jul 2013 22:34:34 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzDpG-0005Da-OR; Tue, 16 Jul 2013 22:34:31 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzDpE-0001vf-Bz; Tue, 16 Jul 2013 22:34:28 +0000 Received: from avon.wwwdotorg.org ([2001:470:1f0f:bd7::2]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzDpB-0001uu-Es for linux-arm-kernel@lists.infradead.org; Tue, 16 Jul 2013 22:34:26 +0000 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id 3580262E3; Tue, 16 Jul 2013 16:46:23 -0600 (MDT) Received: from swarren-lx1.nvidia.com (localhost [127.0.0.1]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 5B902E40EB; Tue, 16 Jul 2013 16:34:03 -0600 (MDT) From: Stephen Warren To: Mike Turquette Subject: [PATCH] clk: tegra: depend on ARCH_TEGRA, not ARCH_TEGRA_* Date: Tue, 16 Jul 2013 16:33:59 -0600 Message-Id: <1374014039-22469-1-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 1.8.1.5 X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.97.7 at avon.wwwdotorg.org X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130716_183425_612710_59B3DF74 X-CRM114-Status: GOOD ( 17.36 ) X-Spam-Score: -2.3 (--) Cc: linux-tegra@vger.kernel.org, Stephen Warren , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Stephen Warren I'm planning to remove CONFIG_ARCH_TEGRA_*_SOC, leaving just ARCH_TEGRA. This will reduce the number of configurations that need to be supported by core Tegra code, e.g. CPU idle, hotplug. As a precursor, we need to update Kconfig for all Tegra drivers not to reference ARCH_TEGRA_*_SOC. The Tegra clock driver contains a fairly large amount of SoC-specific code and data. Introduce explicit config options so that the user can trim the set of supported SoCs if they wish. Default these to on, since most people will probably want to enable support for all SoCs. This also avoids the need to change any defconfig files. Signed-off-by: Stephen Warren --- drivers/clk/Kconfig | 2 ++ drivers/clk/Makefile | 2 +- drivers/clk/tegra/Kconfig | 24 ++++++++++++++++++++++++ drivers/clk/tegra/Makefile | 6 +++--- drivers/clk/tegra/clk-pll.c | 4 ++-- 5 files changed, 32 insertions(+), 6 deletions(-) create mode 100644 drivers/clk/tegra/Kconfig diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 51380d6..8efaf3e 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -87,6 +87,8 @@ config CLK_PPC_CORENET This adds the clock driver support for Freescale PowerPC corenet platforms using common clock framework. +source "drivers/clk/tegra/Kconfig" + endmenu source "drivers/clk/mvebu/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 4038c2b..3368f03 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -30,7 +30,7 @@ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_ARCH_U8500) += ux500/ obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o obj-$(CONFIG_ARCH_ZYNQ) += zynq/ -obj-$(CONFIG_ARCH_TEGRA) += tegra/ +obj-$(CONFIG_CLK_TEGRA) += tegra/ obj-$(CONFIG_PLAT_SAMSUNG) += samsung/ obj-$(CONFIG_X86) += x86/ diff --git a/drivers/clk/tegra/Kconfig b/drivers/clk/tegra/Kconfig new file mode 100644 index 0000000..abe609b --- /dev/null +++ b/drivers/clk/tegra/Kconfig @@ -0,0 +1,24 @@ +config CLK_TEGRA + bool "Clock driver for NVIDIA Tegra SoCs" + depends on ARCH_TEGRA + default y + help + Say y here to enable clock driver support for NVIDIA Tegra SoCs. + + This option provides core functionality; enable support for specific + individual SoCs using the options below. + +config CLK_TEGRA20 + bool "Tegra20 clock support" + depends on CLK_TEGRA + default y + +config CLK_TEGRA30 + bool "Tegra30 clock support" + depends on CLK_TEGRA + default y + +config CLK_TEGRA114 + bool "Tegra114 clock support" + depends on CLK_TEGRA + default y diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile index f49fac2..7b1a929 100644 --- a/drivers/clk/tegra/Makefile +++ b/drivers/clk/tegra/Makefile @@ -7,6 +7,6 @@ obj-y += clk-pll.o obj-y += clk-pll-out.o obj-y += clk-super.o -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clk-tegra20.o -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += clk-tegra30.o -obj-$(CONFIG_ARCH_TEGRA_114_SOC) += clk-tegra114.o +obj-$(CONFIG_CLK_TEGRA20) += clk-tegra20.o +obj-$(CONFIG_CLK_TEGRA30) += clk-tegra30.o +obj-$(CONFIG_CLK_TEGRA114) += clk-tegra114.o diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 197074a..87520c6 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -744,7 +744,7 @@ const struct clk_ops tegra_clk_plle_ops = { .enable = clk_plle_enable, }; -#ifdef CONFIG_ARCH_TEGRA_114_SOC +#ifdef CONFIG_CLK_TEGRA114 static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params, unsigned long parent_rate) @@ -1339,7 +1339,7 @@ struct clk *tegra_clk_register_plle(const char *name, const char *parent_name, return clk; } -#ifdef CONFIG_ARCH_TEGRA_114_SOC +#ifdef CONFIG_CLK_TEGRA114 const struct clk_ops tegra_clk_pllxc_ops = { .is_enabled = clk_pll_is_enabled, .enable = clk_pll_iddq_enable,