From patchwork Wed Jul 17 09:34:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Jensen X-Patchwork-Id: 2828506 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1F3CE9F9F9 for ; Wed, 17 Jul 2013 09:35:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B8F912015D for ; Wed, 17 Jul 2013 09:35:33 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D349420171 for ; Wed, 17 Jul 2013 09:35:31 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzO8u-0006VQ-5U; Wed, 17 Jul 2013 09:35:28 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzO8r-00051z-Rb; Wed, 17 Jul 2013 09:35:25 +0000 Received: from mail-lb0-x22b.google.com ([2a00:1450:4010:c04::22b]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzO8o-00050J-L8 for linux-arm-kernel@lists.infradead.org; Wed, 17 Jul 2013 09:35:23 +0000 Received: by mail-lb0-f171.google.com with SMTP id 13so1414278lba.30 for ; Wed, 17 Jul 2013 02:35:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=Rlh8Rz4DgQ3UPCg0C4WBnytNIBwBy3+7Mnrn+paNrjg=; b=aGPLT5UU9ZkCJdx57XSf1VAJwBrhhK/jb/ULNQjeCUMcMwAeeHv8XkKFYzafC9oKqQ vTyaeow2BINrnpzAcPYu2HyBs0ULOjQPdK39MEipUeBIFG9ATUpugP6cvG/DOJbDU0xM vikWUebef7tILHTtqI/jvjHYrvVLBZAU1Vt7SKi4EbZU5ZaMMcgoru6yCWVnf1KSzTiN XXq3zgMMyP6GzfE4+IbH4feaCfARQMq2JBMn8KBMdwYHc7sMieQwAVBqvztmm31ty6pB pXRahVs7/pnrsj2I8FxJ0eNDuCgL0/ZPJYyG1KE/aL45EYRYmw7wUR6c2I4VnLRz3XwC N0WA== X-Received: by 10.152.21.131 with SMTP id v3mr2602067lae.50.1374053700369; Wed, 17 Jul 2013 02:35:00 -0700 (PDT) Received: from Ildjarn.ath.cx (static-213-115-41-10.sme.bredbandsbolaget.se. [213.115.41.10]) by mx.google.com with ESMTPSA id u1sm2067914lag.5.2013.07.17.02.34.57 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 17 Jul 2013 02:34:59 -0700 (PDT) From: Jonas Jensen To: linux-gpio@vger.kernel.org Subject: [PATCH v3] gpio: Add MOXA ART GPIO driver Date: Wed, 17 Jul 2013 11:34:53 +0200 Message-Id: <1374053693-6166-1-git-send-email-jonas.jensen@gmail.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1373976052-16779-1-git-send-email-jonas.jensen@gmail.com> References: <1373976052-16779-1-git-send-email-jonas.jensen@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130717_053523_082369_D2D85B37 X-CRM114-Status: GOOD ( 16.80 ) X-Spam-Score: -2.0 (--) Cc: arnd@arndb.de, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, Jonas Jensen , arm@kernel.org, grant.likely@linaro.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add GPIO driver for MOXA ART SoCs. Signed-off-by: Jonas Jensen --- Notes: Changes since v2: 1. add devicetree bindings document Applies to next-20130716 .../devicetree/bindings/gpio/moxa,moxart-gpio.txt | 23 +++ drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-moxart.c | 189 +++++++++++++++++++++ 4 files changed, 220 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt create mode 100644 drivers/gpio/gpio-moxart.c diff --git a/Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt b/Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt new file mode 100644 index 0000000..496c081 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt @@ -0,0 +1,23 @@ +MOXA ART GPIO Controller + +Required properties: + +- #gpio-cells : Should be 2 +- compatible : Should be "moxa,moxart-gpio" +- reg : Should contain registers location and length + index 0 : input, output, and direction control + index 1 : enable/disable individual pins, pin 0-31 +- gpio-ready-led : ready LED gpio, with zero flags +- gpio-reset-switch : reset switch gpio, with zero flags + +Example: + + gpio: gpio@98700000 { + gpio-controller; + #gpio-cells = <2>; + compatible = "moxa,moxart-gpio"; + reg = <0x98700000 0xC>, + <0x98100100 0x4>; + gpio-ready-led = <&gpio 27 0>; + gpio-reset-switch = <&gpio 25 0>; + }; diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index b2450ba..521fd97 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -714,6 +714,13 @@ config GPIO_MSIC Enable support for GPIO on intel MSIC controllers found in intel MID devices +config GPIO_MOXART + bool "MOXART GPIO support" + depends on ARCH_MOXART + help + Select this option to enable GPIO driver for + MOXA ART SoC devices. + comment "USB GPIO expanders:" config GPIO_VIPERBOARD diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index ef3e983..44b0de4 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -42,6 +42,7 @@ obj-$(CONFIG_GPIO_MC9S08DZ60) += gpio-mc9s08dz60.o obj-$(CONFIG_GPIO_MCP23S08) += gpio-mcp23s08.o obj-$(CONFIG_GPIO_ML_IOH) += gpio-ml-ioh.o obj-$(CONFIG_GPIO_MM_LANTIQ) += gpio-mm-lantiq.o +obj-$(CONFIG_GPIO_MOXART) += gpio-moxart.o obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc5200.o obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o diff --git a/drivers/gpio/gpio-moxart.c b/drivers/gpio/gpio-moxart.c new file mode 100644 index 0000000..19d4e3b --- /dev/null +++ b/drivers/gpio/gpio-moxart.c @@ -0,0 +1,189 @@ +/* + * MOXA ART SoCs GPIO driver. + * + * Copyright (C) 2013 Jonas Jensen + * + * Jonas Jensen + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_DATA_OUT 0x00 +#define GPIO_DATA_IN 0x04 +#define GPIO_PIN_DIRECTION 0x08 + +static void __iomem *moxart_pincontrol_base; +static void __iomem *moxart_gpio_base; + +void moxart_gpio_enable(u32 gpio) +{ + writel(readl(moxart_pincontrol_base) | gpio, moxart_pincontrol_base); +} + +void moxart_gpio_disable(u32 gpio) +{ + writel(readl(moxart_pincontrol_base) & ~gpio, moxart_pincontrol_base); +} + +static int moxart_gpio_request(struct gpio_chip *chip, unsigned offset) +{ + moxart_gpio_enable(1 << offset); + return pinctrl_request_gpio(offset); +} + +static void moxart_gpio_free(struct gpio_chip *chip, unsigned offset) +{ + pinctrl_free_gpio(offset); + moxart_gpio_disable(1 << offset); +} + +static int moxart_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +{ + void __iomem *ioaddr = moxart_gpio_base + GPIO_PIN_DIRECTION; + + writel(readl(ioaddr) & ~(1 << offset), ioaddr); + return 0; +} + +static int moxart_gpio_direction_output(struct gpio_chip *chip, + unsigned offset, int value) +{ + void __iomem *ioaddr = moxart_gpio_base + GPIO_PIN_DIRECTION; + + writel(readl(ioaddr) | (1 << offset), ioaddr); + return 0; +} + +static void moxart_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + void __iomem *ioaddr = moxart_gpio_base + GPIO_DATA_OUT; + u32 reg = readl(ioaddr); + + (value) ? writel(reg | (1 << offset), ioaddr) : + writel(reg & ~(1 << offset), ioaddr); +} + +static int moxart_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + u32 ret = readl(moxart_gpio_base + GPIO_PIN_DIRECTION); + + if (ret & (1 << offset)) + ret = readl(moxart_gpio_base + GPIO_DATA_OUT) & (1 << offset); + else + ret = readl(moxart_gpio_base + GPIO_DATA_IN) & (1 << offset); + + return ret; +} + +static struct gpio_chip moxart_gpio_chip = { + .label = "moxart-gpio", + .request = moxart_gpio_request, + .free = moxart_gpio_free, + .direction_input = moxart_gpio_direction_input, + .direction_output = moxart_gpio_direction_output, + .set = moxart_gpio_set, + .get = moxart_gpio_get, + .base = 0, + .ngpio = 32, + .can_sleep = 0, +}; + +static int moxart_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct resource *res; + int ret, gpio_ready_led, gpio_reset_switch; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + moxart_gpio_base = devm_ioremap_resource(dev, res); + if (IS_ERR(moxart_gpio_base)) { + dev_err(dev, "%s: devm_ioremap_resource res_gpio failed\n", + dev->of_node->full_name); + return PTR_ERR(moxart_gpio_base); + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + moxart_pincontrol_base = devm_ioremap_resource(dev, res); + if (IS_ERR(moxart_pincontrol_base)) { + dev_err(dev, "%s: devm_ioremap_resource res_pmu failed\n", + dev->of_node->full_name); + return PTR_ERR(moxart_pincontrol_base); + } + + moxart_gpio_chip.dev = dev; + + ret = gpiochip_add(&moxart_gpio_chip); + if (ret) + dev_err(dev, "%s: gpiochip_add failed\n", + dev->of_node->full_name); + + + gpio_ready_led = of_get_named_gpio(pdev->dev.of_node, + "gpio-ready-led", 0); + if (!gpio_is_valid(gpio_ready_led)) { + dev_err(&pdev->dev, "invalid gpio (gpio-ready-led): %d\n", + gpio_ready_led); + return gpio_ready_led; + } + + gpio_reset_switch = of_get_named_gpio(pdev->dev.of_node, + "gpio-reset-switch", 0); + if (!gpio_is_valid(gpio_reset_switch)) { + dev_err(&pdev->dev, "invalid gpio (gpio-reset-switch): %d\n", + gpio_reset_switch); + return gpio_reset_switch; + } + + moxart_gpio_enable(gpio_ready_led | gpio_reset_switch); + + moxart_gpio_direction_input(&moxart_gpio_chip, gpio_reset_switch); + + /* + * gpio_ready_led=0 ready LED on + * gpio_ready_led=1 ready LED off + */ + moxart_gpio_direction_output(&moxart_gpio_chip, gpio_ready_led, 0); + moxart_gpio_set(&moxart_gpio_chip, gpio_ready_led, 0); + + return 0; +} + +static const struct of_device_id moxart_gpio_match[] = { + { .compatible = "moxa,moxart-gpio" }, + { } +}; + +static struct platform_driver moxart_gpio_driver = { + .driver = { + .name = "moxart-gpio", + .owner = THIS_MODULE, + .of_match_table = moxart_gpio_match, + }, + .probe = moxart_gpio_probe, +}; + +static int __init moxart_gpio_init(void) +{ + return platform_driver_register(&moxart_gpio_driver); +} + +postcore_initcall(moxart_gpio_init); + +MODULE_DESCRIPTION("MOXART GPIO chip driver"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Jonas Jensen ");