From patchwork Wed Jul 17 13:40:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 2828611 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0FB31C0AB2 for ; Wed, 17 Jul 2013 13:41:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C3BE0201DA for ; Wed, 17 Jul 2013 13:41:32 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6D637201D3 for ; Wed, 17 Jul 2013 13:41:31 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzRyS-0007NK-UH; Wed, 17 Jul 2013 13:40:57 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzRyA-0003CC-2o; Wed, 17 Jul 2013 13:40:38 +0000 Received: from 9.mo1.mail-out.ovh.net ([178.32.108.172] helo=mo1.mail-out.ovh.net) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzRy7-0003BP-3t for linux-arm-kernel@lists.infradead.org; Wed, 17 Jul 2013 13:40:36 +0000 Received: from mail31.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo1.mail-out.ovh.net (Postfix) with SMTP id F2060FF9E7D for ; Wed, 17 Jul 2013 15:40:13 +0200 (CEST) Received: from b0.ovh.net (HELO queueout) (213.186.33.50) by b0.ovh.net with SMTP; 17 Jul 2013 15:39:45 +0200 Received: from cha74-5-78-236-240-82.fbx.proxad.net (HELO localhost.localdomain) (b.brezillon@overkiz.com@78.236.240.82) by ns0.ovh.net with SMTP; 17 Jul 2013 15:39:43 +0200 From: Boris BREZILLON To: Nicolas Ferre , Ludovic Desroches , Jean-Christophe Plagniol-Villard , Mike Turquette X-Ovh-Mailout: 178.32.228.1 (mo1.mail-out.ovh.net) Subject: [PATCH v2 02/42] ARM: at91: add PMC main clock Date: Wed, 17 Jul 2013 15:40:04 +0200 Message-Id: <1374068404-13654-1-git-send-email-b.brezillon@overkiz.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1374068069-13496-1-git-send-email-b.brezillon@overkiz.com> References: <1374068069-13496-1-git-send-email-b.brezillon@overkiz.com> X-Ovh-Tracer-Id: 11429854380717013100 X-Ovh-Remote: 78.236.240.82 (cha74-5-78-236-240-82.fbx.proxad.net) X-Ovh-Local: 213.186.33.20 (ns0.ovh.net) X-OVH-SPAMSTATE: OK X-OVH-SPAMSCORE: -100 X-OVH-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeijedrvdegucetufdoteggodetrfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-Spam-Check: DONE|U 0.5/N X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeijedrvdegucetufdoteggodetrfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130717_094035_377935_84B4740D X-CRM114-Status: GOOD ( 20.25 ) X-Spam-Score: -1.9 (-) Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Boris BREZILLON X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This is the at91 main oscillator clock implementation using common clk framework. If rate is not provided during clock registraction it is computed using the slow clock (main clk parent in this case) rate and the MCFR register. Signed-off-by: Boris BREZILLON --- drivers/clk/at91/Makefile | 5 ++ drivers/clk/at91/clk-main.c | 106 +++++++++++++++++++++++++++++++++++++++++++ include/linux/clk/at91.h | 10 ++++ 3 files changed, 121 insertions(+) create mode 100644 drivers/clk/at91/Makefile create mode 100644 drivers/clk/at91/clk-main.c diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile new file mode 100644 index 0000000..42c084e --- /dev/null +++ b/drivers/clk/at91/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for at91 specific clk +# + +obj-y += clk-main.o diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c new file mode 100644 index 0000000..738fa39 --- /dev/null +++ b/drivers/clk/at91/clk-main.c @@ -0,0 +1,106 @@ +/* + * drivers/clk/at91/clk-main.c + * + * Copyright (C) 2013 Boris BREZILLON + * + * This mainram is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include + +#define to_clk_main(hw) container_of(hw, struct clk_main, hw) +struct clk_main { + struct clk_hw hw; + unsigned long rate; +}; + +static unsigned long clk_main_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + u32 tmp; + struct clk_main *clkmain = to_clk_main(hw); + if (clkmain->rate) + return clkmain->rate; + while ((tmp = at91_pmc_read(AT91_CKGR_MCFR)) & AT91_PMC_MAINRDY) + ; + tmp &= AT91_PMC_MAINF; + clkmain->rate = (tmp * parent_rate) / 16; + return clkmain->rate; +} + +static const struct clk_ops main_ops = { + .recalc_rate = clk_main_recalc_rate, +}; + +struct clk * __init +at91_clk_register_main(const char *name, + const char *parent_name, + unsigned long rate) +{ + struct clk_main *clkmain; + struct clk *clk = NULL; + struct clk_init_data init; + + if (!rate && !parent_name) + return ERR_PTR(-EINVAL); + + clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL); + if (!clkmain) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &main_ops; + init.parent_names = parent_name ? &parent_name : NULL; + init.num_parents = parent_name ? 1 : 0; + init.flags = parent_name ? 0 : CLK_IS_ROOT; + + clkmain->hw.init = &init; + clkmain->rate = rate; + + clk = clk_register(NULL, &clkmain->hw); + + if (IS_ERR(clk)) + kfree(clkmain); + + return clk; +} + + + +#if defined(CONFIG_OF) +static void __init +of_at91_clk_main_setup(struct device_node *np) +{ + struct clk *clk; + const char *parent_name; + const char *name = np->name; + u32 rate = 0; + + parent_name = of_clk_get_parent_name(np, 0); + of_property_read_string(np, "clock-output-names", &name); + of_property_read_u32(np, "clock-frequency", &rate); + + clk = at91_clk_register_main(name, parent_name, rate); + + if (!IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +static void __init of_at91rm9200_clk_main_setup(struct device_node *np) +{ + of_at91_clk_main_setup(np); +} +CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main", + of_at91rm9200_clk_main_setup); +#endif diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h index 0ce9586..8e83942 100644 --- a/include/linux/clk/at91.h +++ b/include/linux/clk/at91.h @@ -16,6 +16,8 @@ #ifndef AT91_PMC_H #define AT91_PMC_H +#include + #ifndef __ASSEMBLY__ extern void __iomem *at91_pmc_base; @@ -187,4 +189,12 @@ extern void __iomem *at91_pmc_base; #define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */ #define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ + + + +struct clk * __init +at91_clk_register_main(const char *name, + const char *parent_name, + unsigned long rate); + #endif