From patchwork Tue Jul 23 07:20:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 2831844 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 61E309F4D4 for ; Tue, 23 Jul 2013 08:13:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 04224201CE for ; Tue, 23 Jul 2013 08:13:51 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B4D71201CB for ; Tue, 23 Jul 2013 08:13:49 +0000 (UTC) Received: from merlin.infradead.org ([205.233.59.134]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V1X3U-0007w7-8M; Tue, 23 Jul 2013 07:30:44 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V1WyG-0000yw-Bx; Tue, 23 Jul 2013 07:25:20 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V1Wvh-0000it-CZ for linux-arm-kernel@lists.infradead.org; Tue, 23 Jul 2013 07:22:58 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r6N7MMZ5031895; Tue, 23 Jul 2013 02:22:23 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r6N7MMio026685; Tue, 23 Jul 2013 02:22:22 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Tue, 23 Jul 2013 02:22:22 -0500 Received: from sokoban.tieu.ti.com (h79-8.vpn.ti.com [172.24.79.8]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r6N7LQtq027090; Tue, 23 Jul 2013 02:22:20 -0500 From: Tero Kristo To: , , , , , , Subject: [PATCHv4 22/33] CLK: OMAP: update gate clock setup for OMAP3 Date: Tue, 23 Jul 2013 10:20:17 +0300 Message-ID: <1374564028-11352-23-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1374564028-11352-1-git-send-email-t-kristo@ti.com> References: <1374564028-11352-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130723_032241_658236_6DDFDB91 X-CRM114-Status: GOOD ( 11.84 ) X-Spam-Score: -8.4 (--------) Cc: devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP OMAP3 gate clocks are handled through the clk driver now. Basic gate clock can't be used as the OMAP3 gate clocks have some special features, namely the idle status linkage which is on separate register. Signed-off-by: Tero Kristo --- drivers/clk/omap/gate.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/clk/omap/gate.c b/drivers/clk/omap/gate.c index 7186bb2..b560ff4 100644 --- a/drivers/clk/omap/gate.c +++ b/drivers/clk/omap/gate.c @@ -28,12 +28,19 @@ #ifdef CONFIG_OF -static const struct clk_ops omap_gate_clk_ops = { +static const struct clk_ops omap_gate_clkdm_clk_ops = { .init = &omap2_init_clk_clkdm, .enable = &omap2_clkops_enable_clkdm, .disable = &omap2_clkops_disable_clkdm, }; +static const struct clk_ops omap_gate_clk_ops = { + .init = &omap2_init_clk_clkdm, + .enable = &omap2_dflt_clk_enable, + .disable = &omap2_dflt_clk_disable, + .is_enabled = &omap2_dflt_clk_is_enabled, +}; + void __init of_omap_gate_clk_setup(struct device_node *node) { struct clk *clk; @@ -43,6 +50,7 @@ void __init of_omap_gate_clk_setup(struct device_node *node) int num_parents; const char **parent_names; int i; + u32 val; clk_hw = kzalloc(sizeof(struct clk_hw_omap), GFP_KERNEL); if (!clk_hw) { @@ -56,7 +64,22 @@ void __init of_omap_gate_clk_setup(struct device_node *node) of_property_read_string(node, "ti,clkdm-name", &clk_hw->clkdm_name); init.name = clk_name; - init.ops = &omap_gate_clk_ops; + init.flags = 0; + + if (of_property_read_u32_index(node, "reg", 0, &val)) { + /* No register, clkdm control only */ + init.ops = &omap_gate_clkdm_clk_ops; + } else { + init.ops = &omap_gate_clk_ops; + clk_hw->enable_reg = of_iomap(node, 0); + of_property_read_u32(node, "ti,enable-bit", &val); + clk_hw->enable_bit = val; + + if (of_property_read_bool(node, "ti,dss-clk")) + clk_hw->ops = &clkhwops_omap3430es2_dss_usbhost_wait; + else + clk_hw->ops = &clkhwops_wait; + } num_parents = of_clk_get_parent_count(node); if (num_parents < 1) {