From patchwork Wed Jul 24 13:15:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 2832708 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 854F09F4E2 for ; Wed, 24 Jul 2013 13:15:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4822320137 for ; Wed, 24 Jul 2013 13:15:57 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E6B8C200FE for ; Wed, 24 Jul 2013 13:15:55 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V1yuj-00074y-Sq; Wed, 24 Jul 2013 13:15:34 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V1yuX-0002fh-Am; Wed, 24 Jul 2013 13:15:21 +0000 Received: from perceval.ideasonboard.com ([95.142.166.194]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V1yuP-0002d4-8s for linux-arm-kernel@lists.infradead.org; Wed, 24 Jul 2013 13:15:16 +0000 Received: from avalon.ideasonboard.com (unknown [91.178.139.250]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id DF5AC35A4C; Wed, 24 Jul 2013 15:14:15 +0200 (CEST) From: Laurent Pinchart To: linux-sh@vger.kernel.org Subject: [PATCH 02/14] sh-pfc: r8a7790: Remove trailing '_TANS' string from RTS/CTS pins Date: Wed, 24 Jul 2013 15:15:08 +0200 Message-Id: <1374671720-8794-3-git-send-email-laurent.pinchart+renesas@ideasonboard.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1374671720-8794-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com> References: <1374671720-8794-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130724_091513_669942_5A998780 X-CRM114-Status: UNSURE ( 8.44 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) Cc: Kunihito Higashiyama , Shinya Kuribayashi , Shinobu Uehara , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, UPPERCASE_50_75 autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shinya Kuribayashi The RTS/CTS pins have been renamed in the datasheet, rename them here as well. Signed-off-by: Shinya Kuribayashi Signed-off-by: Laurent Pinchart --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 46b3fdf..6adaa85 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -441,14 +441,14 @@ enum { FN_TX0, FN_DU2_DR1, FN_LCDOUT1, FN_SCIFA0_CTS_N, FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC, FN_DU2_DG3, FN_LCDOUT11, FN_PWM0_B, FN_IIC1_SCL_C, FN_I2C1_SCL_C, - FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N_TANS, + FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N, FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B, FN_SCIFA1_RXD, FN_AD_DI, FN_RX1, FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, FN_QCPV_QDE, FN_SCIFA1_TXD, FN_AD_DO, FN_TX1, FN_DU2_DG1, FN_LCDOUT9, FN_SCIFA1_CTS_N, FN_AD_CLK, FN_CTS1_N, FN_MSIOF3_RXD, FN_DU0_DOTCLKOUT, FN_QCLK, - FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N_TANS, + FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N, FN_MSIOF3_TXD, FN_DU1_DOTCLKOUT, FN_QSTVB_QVE, FN_HRTS0_N_C, @@ -808,14 +808,14 @@ enum { TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK, HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK, LCDOUT11_MARK, PWM0_B_MARK, IIC1_SCL_C_MARK, I2C1_SCL_C_MARK, - SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK, + SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_MARK, MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK, SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK, DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK, LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK, CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK, - SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK, + SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_MARK, MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK, HRTS0_N_C_MARK, @@ -1713,7 +1713,7 @@ static const pinmux_enum_t pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP14_15_12, I2C1_SCL_C, SEL_I2C1_2), PINMUX_IPSR_MODSEL_DATA(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0), PINMUX_IPSR_MODSEL_DATA(IP14_18_16, HRTS1_N, SEL_HSCIF1_0), - PINMUX_IPSR_DATA(IP14_18_16, RTS0_N_TANS), + PINMUX_IPSR_DATA(IP14_18_16, RTS0_N), PINMUX_IPSR_DATA(IP14_18_16, MSIOF3_SS1), PINMUX_IPSR_DATA(IP14_18_16, DU2_DG0), PINMUX_IPSR_DATA(IP14_18_16, LCDOUT8), @@ -1736,7 +1736,7 @@ static const pinmux_enum_t pinmux_data[] = { PINMUX_IPSR_DATA(IP14_27_25, QCLK), PINMUX_IPSR_MODSEL_DATA(IP14_30_28, SCIFA1_RTS_N, SEL_SCIFA1_0), PINMUX_IPSR_MODSEL_DATA(IP14_30_28, AD_NCS_N, SEL_ADI_0), - PINMUX_IPSR_DATA(IP14_30_28, RTS1_N_TANS), + PINMUX_IPSR_DATA(IP14_30_28, RTS1_N), PINMUX_IPSR_MODSEL_DATA(IP14_30_28, MSIOF3_TXD, SEL_SOF3_0), PINMUX_IPSR_DATA(IP14_30_28, DU1_DOTCLKOUT), PINMUX_IPSR_DATA(IP14_30_28, QSTVB_QVE), @@ -1906,7 +1906,7 @@ static const unsigned int scif0_ctrl_pins[] = { RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30), }; static const unsigned int scif0_ctrl_mux[] = { - RTS0_N_TANS_MARK, CTS0_N_MARK, + RTS0_N_MARK, CTS0_N_MARK, }; static const unsigned int scif0_data_b_pins[] = { /* RX, TX */ @@ -1935,7 +1935,7 @@ static const unsigned int scif1_ctrl_pins[] = { RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2), }; static const unsigned int scif1_ctrl_mux[] = { - RTS1_N_TANS_MARK, CTS1_N_MARK, + RTS1_N_MARK, CTS1_N_MARK, }; static const unsigned int scif1_data_b_pins[] = { /* RX, TX */ @@ -3764,7 +3764,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { /* IP14_30 [1] */ 0, 0, /* IP14_30_28 [3] */ - FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N_TANS, + FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N, FN_MSIOF3_TXD, FN_DU1_DOTCLKOUT, FN_QSTVB_QVE, FN_HRTS0_N_C, 0, /* IP14_27_25 [3] */ @@ -3777,7 +3777,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { FN_SCIFA1_RXD, FN_AD_DI, FN_RX1, FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, FN_QCPV_QDE, 0, 0, 0, /* IP14_18_16 [3] */ - FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N_TANS, + FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N, FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B, 0, /* IP14_15_12 [4] */ FN_SCIFA0_CTS_N, FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC,