From patchwork Fri Jul 26 10:05:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2833962 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4A47A9F243 for ; Fri, 26 Jul 2013 10:11:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E6B3A20148 for ; Fri, 26 Jul 2013 10:11:36 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8072A20155 for ; Fri, 26 Jul 2013 10:11:35 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V2ez8-0000sm-7a; Fri, 26 Jul 2013 10:10:55 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V2eyq-0003sQ-2r; Fri, 26 Jul 2013 10:10:36 +0000 Received: from mail-pd0-x22e.google.com ([2607:f8b0:400e:c02::22e]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V2eyj-0003qF-6j for linux-arm-kernel@lists.infradead.org; Fri, 26 Jul 2013 10:10:30 +0000 Received: by mail-pd0-f174.google.com with SMTP id 3so1720993pdj.33 for ; Fri, 26 Jul 2013 03:10:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=rthLLURgNun98HDPnkZ3Oyko/0bCm4FNkkMEJwlGUl4=; b=tPmoGptM1K9L4qWx8EwL8iYNvDJaDUHUYq//CTyxeXqYcVhrDsHJ+5fU2sHf2/5vQa gd691hN1RzhSmQizEfjXNNTneTUVIMmodMKEBJ45aPQIrts/EG2WErjdu2QMnWbxIUWf TPGSqPrBwYRTCjh6d980OmvE0c+zUQtBfkjONUGovK1Ica7sQbWUN0PBjn8SsfMogUck +6v3h7Tz38v9iELKaOPzh/SaDo8SE0KrOQihfcfqWLdCUeU9neeHw93tsUKT5mSpkx81 EP7YwUebvanUuiV2QROyPFbSjbln/uaNblyTxPPe197fLpgRRIE7F9fnPsADRbDrEziT hZKg== X-Received: by 10.66.186.79 with SMTP id fi15mr52711158pac.160.1374833407667; Fri, 26 Jul 2013 03:10:07 -0700 (PDT) Received: from localhost.localdomain ([67.229.68.101]) by mx.google.com with ESMTPSA id kc8sm59263070pbc.18.2013.07.26.03.09.59 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 26 Jul 2013 03:10:07 -0700 (PDT) From: Haojian Zhuang To: tglx@linutronix.de, arnd@arndb.de, linux-arm-kernel@lists.infradead.org, chao.xie@marvell.com, john.stultz@linaro.org, mturquette@linaro.org, eric.y.miao@gmail.com, linux@arm.linux.org.uk, olof@lixom.net Subject: [PATCH v6 05/11] irqchip: mmp: avoid to include irqs head file Date: Fri, 26 Jul 2013 18:05:27 +0800 Message-Id: <1374833133-21119-6-git-send-email-haojian.zhuang@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1374833133-21119-1-git-send-email-haojian.zhuang@gmail.com> References: <1374833133-21119-1-git-send-email-haojian.zhuang@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130726_061029_476706_E8E8375D X-CRM114-Status: GOOD ( 13.53 ) X-Spam-Score: -2.0 (--) Cc: Haojian Zhuang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since in irq-mmp.c blocks the multiplatform build, remove it instead. Signed-off-by: Haojian Zhuang --- drivers/irqchip/irq-mmp.c | 45 +++++++++++++++++++++------------------------ 1 file changed, 21 insertions(+), 24 deletions(-) diff --git a/drivers/irqchip/irq-mmp.c b/drivers/irqchip/irq-mmp.c index 1f81432..2cb7cd0 100644 --- a/drivers/irqchip/irq-mmp.c +++ b/drivers/irqchip/irq-mmp.c @@ -24,8 +24,6 @@ #include #include -#include - #include "irqchip.h" #define MAX_ICU_NR 16 @@ -249,7 +247,7 @@ void __init icu_init_irq(void) /* MMP2 (ARMv7) */ void __init mmp2_init_icu(void) { - int irq; + int irq, end; max_icu_nr = 8; mmp_icu_base = ioremap(0xd4282000, 0x1000); @@ -263,11 +261,12 @@ void __init mmp2_init_icu(void) &icu_data[0]); icu_data[1].reg_status = mmp_icu_base + 0x150; icu_data[1].reg_mask = mmp_icu_base + 0x168; - icu_data[1].clr_mfp_irq_base = IRQ_MMP2_PMIC_BASE; - icu_data[1].clr_mfp_hwirq = IRQ_MMP2_PMIC - IRQ_MMP2_PMIC_BASE; + icu_data[1].clr_mfp_irq_base = icu_data[0].virq_base + + icu_data[0].nr_irqs; + icu_data[1].clr_mfp_hwirq = 1; /* offset to IRQ_MMP2_PMIC_BASE */ icu_data[1].nr_irqs = 2; icu_data[1].cascade_irq = 4; - icu_data[1].virq_base = IRQ_MMP2_PMIC_BASE; + icu_data[1].virq_base = icu_data[0].virq_base + icu_data[0].nr_irqs; icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs, icu_data[1].virq_base, 0, &irq_domain_simple_ops, @@ -276,7 +275,7 @@ void __init mmp2_init_icu(void) icu_data[2].reg_mask = mmp_icu_base + 0x16c; icu_data[2].nr_irqs = 2; icu_data[2].cascade_irq = 5; - icu_data[2].virq_base = IRQ_MMP2_RTC_BASE; + icu_data[2].virq_base = icu_data[1].virq_base + icu_data[1].nr_irqs; icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs, icu_data[2].virq_base, 0, &irq_domain_simple_ops, @@ -285,7 +284,7 @@ void __init mmp2_init_icu(void) icu_data[3].reg_mask = mmp_icu_base + 0x17c; icu_data[3].nr_irqs = 3; icu_data[3].cascade_irq = 9; - icu_data[3].virq_base = IRQ_MMP2_KEYPAD_BASE; + icu_data[3].virq_base = icu_data[2].virq_base + icu_data[2].nr_irqs; icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs, icu_data[3].virq_base, 0, &irq_domain_simple_ops, @@ -294,7 +293,7 @@ void __init mmp2_init_icu(void) icu_data[4].reg_mask = mmp_icu_base + 0x170; icu_data[4].nr_irqs = 5; icu_data[4].cascade_irq = 17; - icu_data[4].virq_base = IRQ_MMP2_TWSI_BASE; + icu_data[4].virq_base = icu_data[3].virq_base + icu_data[3].nr_irqs; icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs, icu_data[4].virq_base, 0, &irq_domain_simple_ops, @@ -303,7 +302,7 @@ void __init mmp2_init_icu(void) icu_data[5].reg_mask = mmp_icu_base + 0x174; icu_data[5].nr_irqs = 15; icu_data[5].cascade_irq = 35; - icu_data[5].virq_base = IRQ_MMP2_MISC_BASE; + icu_data[5].virq_base = icu_data[4].virq_base + icu_data[4].nr_irqs; icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs, icu_data[5].virq_base, 0, &irq_domain_simple_ops, @@ -312,7 +311,7 @@ void __init mmp2_init_icu(void) icu_data[6].reg_mask = mmp_icu_base + 0x178; icu_data[6].nr_irqs = 2; icu_data[6].cascade_irq = 51; - icu_data[6].virq_base = IRQ_MMP2_MIPI_HSI1_BASE; + icu_data[6].virq_base = icu_data[5].virq_base + icu_data[5].nr_irqs; icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs, icu_data[6].virq_base, 0, &irq_domain_simple_ops, @@ -321,28 +320,26 @@ void __init mmp2_init_icu(void) icu_data[7].reg_mask = mmp_icu_base + 0x184; icu_data[7].nr_irqs = 2; icu_data[7].cascade_irq = 55; - icu_data[7].virq_base = IRQ_MMP2_MIPI_HSI0_BASE; + icu_data[7].virq_base = icu_data[6].virq_base + icu_data[6].nr_irqs; icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs, icu_data[7].virq_base, 0, &irq_domain_simple_ops, &icu_data[7]); - for (irq = 0; irq < IRQ_MMP2_MUX_END; irq++) { + end = icu_data[7].virq_base + icu_data[7].nr_irqs; + for (irq = 0; irq < end; irq++) { icu_mask_irq(irq_get_irq_data(irq)); - switch (irq) { - case IRQ_MMP2_PMIC_MUX: - case IRQ_MMP2_RTC_MUX: - case IRQ_MMP2_KEYPAD_MUX: - case IRQ_MMP2_TWSI_MUX: - case IRQ_MMP2_MISC_MUX: - case IRQ_MMP2_MIPI_HSI1_MUX: - case IRQ_MMP2_MIPI_HSI0_MUX: + if (irq == icu_data[1].cascade_irq || + irq == icu_data[2].cascade_irq || + irq == icu_data[3].cascade_irq || + irq == icu_data[4].cascade_irq || + irq == icu_data[5].cascade_irq || + irq == icu_data[6].cascade_irq || + irq == icu_data[7].cascade_irq) { irq_set_chip(irq, &icu_irq_chip); irq_set_chained_handler(irq, icu_mux_irq_demux); - break; - default: + } else { irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq); - break; } set_irq_flags(irq, IRQF_VALID); }