From patchwork Sun Jul 28 21:14:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 2834727 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3F340C0319 for ; Sun, 28 Jul 2013 21:15:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0C08920126 for ; Sun, 28 Jul 2013 21:15:15 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 634722011E for ; Sun, 28 Jul 2013 21:15:10 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V3YIu-0001OO-Tw; Sun, 28 Jul 2013 21:15:01 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V3YIs-0000nl-Ld; Sun, 28 Jul 2013 21:14:58 +0000 Received: from mail-ob0-x22f.google.com ([2607:f8b0:4003:c01::22f]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V3YIm-0000md-5p for linux-arm-kernel@lists.infradead.org; Sun, 28 Jul 2013 21:14:56 +0000 Received: by mail-ob0-f175.google.com with SMTP id xn12so7825976obc.20 for ; Sun, 28 Jul 2013 14:14:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer; bh=CyUOXbKB3rMybvq+y3I07vOugHoiTSbsqE9SHElxZKQ=; b=yvIYRC44nS9iSpcmih95CBi1HTW3igXwJIgPZw8KVfPgcyRQTQPDUsKy0lCYM5KoUh 6+EyEtFWSpMliZySN7LxagWc1V8+wtRWbC1egSKOsyXpCjSZO97ozYgzl9KyQUTpbjR5 gSKFIseVtb2f4QWg00VNTCysgG5U8v+lfqoGq6jNiTfpjqKQeY0+sfXzQlP1NsZ5TC80 d/3bUwDjwlhpizkrhjg1Kj4EFm7LKdVZwSad27ac+4Nef/cwkaUd6Q9vMaAbI1pKWJOc oEanIgxp0zPf5pjTkuTzqzx/Wc6/nEMcQJNslxMBDRk9vuQ9YIxBegelj+2ijW3PogZE BElQ== X-Received: by 10.60.116.6 with SMTP id js6mr21524292oeb.4.1375046068274; Sun, 28 Jul 2013 14:14:28 -0700 (PDT) Received: from rob-laptop.grandenetworks.net (65-36-73-129.dyn.grandenetworks.net. [65.36.73.129]) by mx.google.com with ESMTPSA id hm1sm83201851obb.9.2013.07.28.14.14.27 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 28 Jul 2013 14:14:27 -0700 (PDT) From: Rob Herring To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2] ARM: Add check for Cortex-A15 errata 798181 ECO Date: Sun, 28 Jul 2013 16:14:08 -0500 Message-Id: <1375046048-25853-1-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.8.1.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130728_171452_279464_10BFFAAD X-CRM114-Status: GOOD ( 14.52 ) X-Spam-Score: -1.8 (-) Cc: olof@lixom.net, Russell King , Rob Herring X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rob Herring The work-around for A15 errata 798181 is not needed if appropriate ECO fixes have been applied to r3p2 and earlier core revisions. This can be checked by reading REVIDR register bits 4 and 9. If only bit 4 is set, then the IPI broadcast can be skipped. Signed-off-by: Rob Herring --- v2: - Determine the work-around needed and save in a static varible instead of re-reading the ID registers. arch/arm/include/asm/cputype.h | 1 + arch/arm/kernel/smp_tlb.c | 31 +++++++++++++++++++++++-------- 2 files changed, 24 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index 8c25dc4..e5952b7 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -10,6 +10,7 @@ #define CPUID_TLBTYPE 3 #define CPUID_MPUIR 4 #define CPUID_MPIDR 5 +#define CPUID_REVIDR 6 #ifdef CONFIG_CPU_V7M #define CPUID_EXT_PFR0 0x40 diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c index a98b62d..da20db1 100644 --- a/arch/arm/kernel/smp_tlb.c +++ b/arch/arm/kernel/smp_tlb.c @@ -73,12 +73,29 @@ static inline void ipi_flush_bp_all(void *ignored) #ifdef CONFIG_ARM_ERRATA_798181 static int erratum_a15_798181(void) { - unsigned int midr = read_cpuid_id(); - - /* Cortex-A15 r0p0..r3p2 affected */ - if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2) - return 0; - return 1; + static int errata_fix_needed = -1; + + if (unlikely(errata_fix_needed == -1)) { + unsigned int midr = read_cpuid_id(); + unsigned int revidr = read_cpuid(CPUID_REVIDR); + + /* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */ + if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2 || + (revidr & 0x210) == 0x210) { + errata_fix_needed = 0; /* No work-around needed */ + return 0; + } + if (revidr & 0x10) + errata_fix_needed = 1; /* Only TLB flush needed */ + else + errata_fix_needed = 2; /* IPI broadcast needed */ + } + + if (errata_fix_needed) + dummy_flush_tlb_a15_erratum(); + + /* Return 1 if IPI broadcast to other cores is needed */ + return (errata_fix_needed == 2) ? 1: 0; } #else static int erratum_a15_798181(void) @@ -97,7 +114,6 @@ static void broadcast_tlb_a15_erratum(void) if (!erratum_a15_798181()) return; - dummy_flush_tlb_a15_erratum(); smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1); } @@ -109,7 +125,6 @@ static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm) if (!erratum_a15_798181()) return; - dummy_flush_tlb_a15_erratum(); this_cpu = get_cpu(); a15_erratum_get_cpumask(this_cpu, mm, &mask); smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);