From patchwork Tue Jul 30 14:44:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 2835702 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1C2569F9CE for ; Tue, 30 Jul 2013 14:45:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F0FD220414 for ; Tue, 30 Jul 2013 14:45:49 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2E8E720423 for ; Tue, 30 Jul 2013 14:45:45 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V4BB9-0007aP-G3; Tue, 30 Jul 2013 14:45:35 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V4BB1-00012a-Q6; Tue, 30 Jul 2013 14:45:27 +0000 Received: from [94.23.35.102] (helo=mail.free-electrons.com) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V4BAk-0000zJ-JV for linux-arm-kernel@lists.infradead.org; Tue, 30 Jul 2013 14:45:11 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id A779CBAD; Tue, 30 Jul 2013 16:44:49 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 34B157DE; Tue, 30 Jul 2013 16:44:49 +0200 (CEST) From: Maxime Ripard To: Mike Turquette Subject: [PATCH 2/4] clk: sunxi: Allow to specify the divider width from the dividers data Date: Tue, 30 Jul 2013 16:44:20 +0200 Message-Id: <1375195462-19566-3-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.8.3.4 In-Reply-To: <1375195462-19566-1-git-send-email-maxime.ripard@free-electrons.com> References: <1375195462-19566-1-git-send-email-maxime.ripard@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130730_104510_767561_BAE741F4 X-CRM114-Status: UNSURE ( 9.88 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.4 (/) Cc: Emilio Lopez , linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, kevin.z.m.zh@gmail.com, sunny@allwinnertech.com, shuge@allwinnertech.com, Maxime Ripard , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The divider width used to be hardcoded. Some A31 dividers are no longer with the hardcoded width, so we need to make it specific to each divider and set it in the dividers data. Signed-off-by: Maxime Ripard Reviewed-by: Emilio López --- drivers/clk/sunxi/clk-sunxi.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index 3c91888..6e9cbc9 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -277,26 +277,28 @@ static void __init sunxi_mux_clk_setup(struct device_node *node, * sunxi_divider_clk_setup() - Setup function for simple divider clocks */ -#define SUNXI_DIVISOR_WIDTH 2 - struct div_data { - u8 shift; - u8 pow; + u8 shift; + u8 pow; + u8 width; }; static const __initconst struct div_data sun4i_axi_data = { - .shift = 0, - .pow = 0, + .shift = 0, + .pow = 0, + .width = 2, }; static const __initconst struct div_data sun4i_ahb_data = { - .shift = 4, - .pow = 1, + .shift = 4, + .pow = 1, + .width = 2, }; static const __initconst struct div_data sun4i_apb0_data = { - .shift = 8, - .pow = 1, + .shift = 8, + .pow = 1, + .width = 2, }; static void __init sunxi_divider_clk_setup(struct device_node *node, @@ -312,7 +314,7 @@ static void __init sunxi_divider_clk_setup(struct device_node *node, clk_parent = of_clk_get_parent_name(node, 0); clk = clk_register_divider(NULL, clk_name, clk_parent, 0, - reg, data->shift, SUNXI_DIVISOR_WIDTH, + reg, data->shift, data->width, data->pow ? CLK_DIVIDER_POWER_OF_TWO : 0, &clk_lock); if (clk) {