diff mbox

arm: zynq: dt: Set correct L2 ram latencies

Message ID 1375313099-8402-1-git-send-email-soren.brinkmann@xilinx.com (mailing list archive)
State New, archived
Headers show

Commit Message

Soren Brinkmann July 31, 2013, 11:24 p.m. UTC 
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
---
 arch/arm/boot/dts/zynq-7000.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Michal Simek Aug. 2, 2013, 11:37 a.m. UTC | #1 
On 08/01/2013 01:24 AM, Soren Brinkmann wrote:
> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
> ---
>  arch/arm/boot/dts/zynq-7000.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 6f54a64..e32b92b 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -41,8 +41,8 @@
>  		L2: cache-controller {
>  			compatible = "arm,pl310-cache";
>  			reg = <0xF8F02000 0x1000>;
> -			arm,data-latency = <2 3 2>;
> -			arm,tag-latency = <2 3 2>;
> +			arm,data-latency = <3 2 2>;
> +			arm,tag-latency = <2 2 2>;
>  			cache-unified;
>  			cache-level = <2>;
>  		};
> 

Applied to zynq/dt.

Thanks,
Michal
diff mbox

Patch

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 6f54a64..e32b92b 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -41,8 +41,8 @@ 
 		L2: cache-controller {
 			compatible = "arm,pl310-cache";
 			reg = <0xF8F02000 0x1000>;
-			arm,data-latency = <2 3 2>;
-			arm,tag-latency = <2 3 2>;
+			arm,data-latency = <3 2 2>;
+			arm,tag-latency = <2 2 2>;
 			cache-unified;
 			cache-level = <2>;
 		};