From patchwork Thu Aug 1 04:22:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 2836759 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1A8119F9C8 for ; Thu, 1 Aug 2013 06:14:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3B3F22018C for ; Thu, 1 Aug 2013 06:14:35 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3EABF201D6 for ; Thu, 1 Aug 2013 06:14:34 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V4m9S-0002Fd-CL; Thu, 01 Aug 2013 06:14:18 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V4m9O-0006yv-E2; Thu, 01 Aug 2013 06:14:14 +0000 Received: from co1ehsobe005.messaging.microsoft.com ([216.32.180.188] helo=co1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V4m9G-0006xY-Qy for linux-arm-kernel@lists.infradead.org; Thu, 01 Aug 2013 06:14:07 +0000 Received: from mail113-co1-R.bigfish.com (10.243.78.225) by CO1EHSOBE041.bigfish.com (10.243.66.106) with Microsoft SMTP Server id 14.1.225.22; Thu, 1 Aug 2013 06:13:43 +0000 Received: from mail113-co1 (localhost [127.0.0.1]) by mail113-co1-R.bigfish.com (Postfix) with ESMTP id 26A564A00C0; Thu, 1 Aug 2013 06:13:43 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zcb8kzzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275dh1de097hz2dh2a8h668h839hd24he5bhf0ah107ah11b5h121eh1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14afh1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e1dh1e23h1155h) Received: from mail113-co1 (localhost.localdomain [127.0.0.1]) by mail113-co1 (MessageSwitch) id 1375337620911868_19575; Thu, 1 Aug 2013 06:13:40 +0000 (UTC) Received: from CO1EHSMHS016.bigfish.com (unknown [10.243.78.227]) by mail113-co1.bigfish.com (Postfix) with ESMTP id D11EE280049; Thu, 1 Aug 2013 06:13:40 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS016.bigfish.com (10.243.66.26) with Microsoft SMTP Server (TLS) id 14.16.227.3; Thu, 1 Aug 2013 06:13:40 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.3.136.1; Thu, 1 Aug 2013 06:13:39 +0000 Received: from shlinux1.ap.freescale.net (shlinux1.ap.freescale.net [10.192.225.216]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r716DXeK023294; Wed, 31 Jul 2013 23:13:39 -0700 Received: by shlinux1.ap.freescale.net (Postfix, from userid 1027) id 3D3AC1AE0F8; Thu, 1 Aug 2013 12:22:06 +0800 (CST) From: Shawn Guo To: Subject: [PATCH 2/2] ARM: dts: imx6q: add quirky select input for USB_OTG_ID Date: Thu, 1 Aug 2013 12:22:04 +0800 Message-ID: <1375330924-27384-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1375330924-27384-1-git-send-email-shawn.guo@linaro.org> References: <1375330924-27384-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: freescale.net X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130801_021407_008522_06587E07 X-CRM114-Status: GOOD ( 11.28 ) X-Spam-Score: -2.6 (--) Cc: Linus Walleij , Shawn Guo , Peter Chen , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For some reason, the select input of pin function USB_OTG_ID is not implemented via a regular select input register but using the bit USB_OTG_ID_ SEL (shift 13) of IOMUXC_GPR1 register (offset 0x4). As per the workaround for such quirk implemented in pinctrl driver, we need to compose the input_val cell as below. 31 23 15 7 0 | 0xff | shift | width | select | Thus, we have 0xff0d0100 for MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID and 0xff0d0101 for MX6QDL_PAD_GPIO_1__USB_OTG_ID in input_val cell. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-pinfunc.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6q-pinfunc.h b/arch/arm/boot/dts/imx6q-pinfunc.h index c0e38a4..44507a3 100644 --- a/arch/arm/boot/dts/imx6q-pinfunc.h +++ b/arch/arm/boot/dts/imx6q-pinfunc.h @@ -536,7 +536,7 @@ #define MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS 0x1d4 0x4e8 0x85c 0x2 0x0 #define MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1d4 0x4e8 0x000 0x5 0x0 #define MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK 0x1d4 0x4e8 0x000 0x6 0x0 -#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1d8 0x4ec 0x000 0x0 0x0 +#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1d8 0x4ec 0x004 0x0 0xff0d0100 #define MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1d8 0x4ec 0x000 0x1 0x0 #define MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK 0x1d8 0x4ec 0x864 0x2 0x0 #define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1d8 0x4ec 0x914 0x3 0x1 @@ -654,7 +654,7 @@ #define MX6QDL_PAD_GPIO_1__ESAI_RX_CLK 0x224 0x5f4 0x86c 0x0 0x1 #define MX6QDL_PAD_GPIO_1__WDOG2_B 0x224 0x5f4 0x000 0x1 0x0 #define MX6QDL_PAD_GPIO_1__KEY_ROW5 0x224 0x5f4 0x8f4 0x2 0x0 -#define MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x224 0x5f4 0x000 0x3 0x0 +#define MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x224 0x5f4 0x004 0x3 0xff0d0101 #define MX6QDL_PAD_GPIO_1__PWM2_OUT 0x224 0x5f4 0x000 0x4 0x0 #define MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x224 0x5f4 0x000 0x5 0x0 #define MX6QDL_PAD_GPIO_1__SD1_CD_B 0x224 0x5f4 0x000 0x6 0x0