From patchwork Wed Aug 14 09:22:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 2844288 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 025D2BF546 for ; Wed, 14 Aug 2013 09:24:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 652CE20455 for ; Wed, 14 Aug 2013 09:24:09 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 502DF20454 for ; Wed, 14 Aug 2013 09:24:08 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V9XJ5-00080g-5t; Wed, 14 Aug 2013 09:23:55 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V9XIx-0002E9-SB; Wed, 14 Aug 2013 09:23:47 +0000 Received: from smtp151.iad.emailsrvr.com ([207.97.245.151]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V9XIm-0002BV-Dw for linux-arm-kernel@lists.infradead.org; Wed, 14 Aug 2013 09:23:37 +0000 Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp55.relay.iad1a.emailsrvr.com (SMTP Server) with ESMTP id 6CDF82E032E; Wed, 14 Aug 2013 05:23:12 -0400 (EDT) X-Virus-Scanned: OK Received: by smtp55.relay.iad1a.emailsrvr.com (Authenticated sender: andre.przywara-AT-calxeda.com) with ESMTPSA id 65C3C2E030C; Wed, 14 Aug 2013 05:23:11 -0400 (EDT) From: Andre Przywara To: christoffer.dall@linaro.org Subject: [PATCH] KVM: ARM: ignore guest L2 cache control SMCs on Highbank and OMAP Date: Wed, 14 Aug 2013 11:22:05 +0200 Message-Id: <1376472125-23350-1-git-send-email-andre.przywara@calxeda.com> X-Mailer: git-send-email 1.7.12.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130814_052336_661584_B64CBAC5 X-CRM114-Status: GOOD ( 10.61 ) X-Spam-Score: -2.6 (--) Cc: Andre Przywara , linux-arm-kernel@lists.infradead.org, rob.herring@calxeda.com, kvmarm@lists.cs.columbia.edu X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Guest kernels with CONFIG_L2X0 set (for instance Highbank or OMAP4) will trigger SMCs to handle the L2 cache controller (PL310). This will currently inject #UNDEFs and eventually stop the guest. We don't need explicit L2 cache controller handling on A15s anymore, so it is safe to simply ignore these calls and proceed with the next instruction. Signed-off-by: Andre Przywara --- arch/arm/kvm/handle_exit.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/kvm/handle_exit.c b/arch/arm/kvm/handle_exit.c index df4c82d..2cbe6a0 100644 --- a/arch/arm/kvm/handle_exit.c +++ b/arch/arm/kvm/handle_exit.c @@ -50,8 +50,28 @@ static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run) return 1; } +/* + * OMAP4 and Highbank machines do a SMC call to handle the L2 cache + * controller. They put 0x102 in r12 to request this functionality. + * This is not needed on A15s, so we can safely ignore it in KVM guests. + */ +static int kvm_ignore_l2x0_call(struct kvm_vcpu *vcpu) +{ + unsigned long fn_nr = *vcpu_reg(vcpu, 12) & ~((u32) 0); + + if (fn_nr == 0x102) { + kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); + return 1; + } + + return 0; +} + static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run) { + if (kvm_ignore_l2x0_call(vcpu)) + return 1; + kvm_inject_undefined(vcpu); return 1; }