Message ID | 1376784748-31914-1-git-send-email-robherring2@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Sat, Aug 17, 2013 at 07:12:28PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > Section entries are 2MB on LPAE, so the DEBUG_LL virtual address must > have the same offset in the 2MB section as the physical address. This > fixes async external aborts when DEBUG_LL is enabled on Midway. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- > v2: Rebase on Russell's DEBUG_LL clean-up Do you also want to do a patch for this for v3.11, because if it's wrong in my series, it's wrong in mainline at the moment: - ldr \rv, =0xfee36000 - ldr \rp, =0xfff36000
On Mon, Sep 2, 2013 at 7:48 AM, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote: > On Sat, Aug 17, 2013 at 07:12:28PM -0500, Rob Herring wrote: >> From: Rob Herring <rob.herring@calxeda.com> >> >> Section entries are 2MB on LPAE, so the DEBUG_LL virtual address must >> have the same offset in the 2MB section as the physical address. This >> fixes async external aborts when DEBUG_LL is enabled on Midway. >> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >> --- >> v2: Rebase on Russell's DEBUG_LL clean-up > > Do you also want to do a patch for this for v3.11, because if it's wrong > in my series, it's wrong in mainline at the moment: That would be v1 of my patch. There are other fixes needed for LPAE on Midway in 3.11, so this fix alone is not really needed. Rob
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 2d57da3..2a88a4d 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1005,7 +1005,7 @@ config DEBUG_UART_VIRT default 0xfee003f8 if FOOTBRIDGE default 0xfee08300 if DEBUG_DAVINCI_TNETV107X_UART1 default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART - default 0xfee36000 if DEBUG_HIGHBANK_UART + default 0xfef36000 if DEBUG_HIGHBANK_UART default 0xfee82340 if ARCH_IOP13XX default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN