From patchwork Sun Aug 18 19:35:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 2846224 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1B88BBF546 for ; Sun, 18 Aug 2013 19:36:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3691D2026C for ; Sun, 18 Aug 2013 19:36:29 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0E2C520221 for ; Sun, 18 Aug 2013 19:36:28 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VB8lt-0004kb-MD; Sun, 18 Aug 2013 19:36:17 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VB8lr-00078E-Ab; Sun, 18 Aug 2013 19:36:15 +0000 Received: from mail-ob0-x22d.google.com ([2607:f8b0:4003:c01::22d]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VB8ln-00077K-NE for linux-arm-kernel@lists.infradead.org; Sun, 18 Aug 2013 19:36:12 +0000 Received: by mail-ob0-f173.google.com with SMTP id ta17so4076632obb.4 for ; Sun, 18 Aug 2013 12:35:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dfYCRy9VyKIHU7dXqg0eK0ETGXEE/t7hYB2p15cvXuI=; b=sjjlHYsaIx+d0xRYobSlp1wu84Fe5nzqrm+Z4l9FMKsJS/E2b1jddxScOOE2eZ0p8Q fwOcNvByQecc0kJ0bsKenDvs9iDL7VqQfpSB7OS1w17abuUF8fQ37hkPtnvPraSVe8MR ZIILGXc1SOpaQKxr+F4YbDu9u5vq6tMlCnNDmt/VCA4MSYfKtDzMqGJXU59+fiOK5S9C sdgcQhKr+Rf0uxF0I86SvU02HQXzHMrk3HOPkrw4L3bNXbtTl4teEzrWTNHLdD4ibfLo fnI+H9GX8Ax1Z8aQDNzCdNDY39cA58mXERq06sxj4UuPkEgzNU+6kk7hh+p5PfXafR+W 4Cgw== X-Received: by 10.50.49.14 with SMTP id q14mr3381174ign.2.1376854546272; Sun, 18 Aug 2013 12:35:46 -0700 (PDT) Received: from rob-laptop.grandenetworks.net (65-36-73-129.dyn.grandenetworks.net. [65.36.73.129]) by mx.google.com with ESMTPSA id k6sm8647403igx.8.1969.12.31.16.00.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 18 Aug 2013 12:35:45 -0700 (PDT) From: Rob Herring To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] ARM: highbank: avoid L2 cache smc calls when PL310 is not present Date: Sun, 18 Aug 2013 14:35:18 -0500 Message-Id: <1376854518-22596-2-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1376854518-22596-1-git-send-email-robherring2@gmail.com> References: <1376854518-22596-1-git-send-email-robherring2@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130818_153612_044222_4E341CED X-CRM114-Status: GOOD ( 10.56 ) X-Spam-Score: -1.8 (-) Cc: Andre Przywara , Rob Herring X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rob Herring While Midway firmware handles L2 smc calls as nops, the custom smc calls present a problem when running virtualized Midway guest. They aren't needed so just avoid calling them. In the process, cleanup the L2X0 ifdefs and use IS_ENABLED instead. Signed-off-by: Rob Herring --- arch/arm/mach-highbank/highbank.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index 0749b42..42ac14b 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -65,13 +65,11 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr) HB_JUMP_TABLE_PHYS(cpu) + 15); } -#ifdef CONFIG_CACHE_L2X0 static void highbank_l2x0_disable(void) { /* Disable PL310 L2 Cache controller */ highbank_smc1(0x102, 0x0); } -#endif static void __init highbank_init_irq(void) { @@ -80,12 +78,13 @@ static void __init highbank_init_irq(void) if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) highbank_scu_map_io(); -#ifdef CONFIG_CACHE_L2X0 /* Enable PL310 L2 Cache controller */ - highbank_smc1(0x102, 0x1); - l2x0_of_init(0, ~0UL); - outer_cache.disable = highbank_l2x0_disable; -#endif + if (IS_ENABLED(CONFIG_CACHE_L2X0) && + of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) { + highbank_smc1(0x102, 0x1); + l2x0_of_init(0, ~0UL); + outer_cache.disable = highbank_l2x0_disable; + } } static void __init highbank_timer_init(void)