From patchwork Tue Aug 20 08:38:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Ying X-Patchwork-Id: 2846917 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 24D089F2F4 for ; Tue, 20 Aug 2013 08:40:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E6BE4200E0 for ; Tue, 20 Aug 2013 08:40:24 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 80B6720117 for ; Tue, 20 Aug 2013 08:40:23 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VBhTg-0007al-O3; Tue, 20 Aug 2013 08:39:49 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VBhTU-0005ka-Ty; Tue, 20 Aug 2013 08:39:36 +0000 Received: from am1ehsobe004.messaging.microsoft.com ([213.199.154.207] helo=am1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VBhTL-0005hL-T1 for linux-arm-kernel@lists.infradead.org; Tue, 20 Aug 2013 08:39:29 +0000 Received: from mail7-am1-R.bigfish.com (10.3.201.247) by AM1EHSOBE008.bigfish.com (10.3.204.28) with Microsoft SMTP Server id 14.1.225.22; Tue, 20 Aug 2013 08:39:07 +0000 Received: from mail7-am1 (localhost [127.0.0.1]) by mail7-am1-R.bigfish.com (Postfix) with ESMTP id 99C2D460234; Tue, 20 Aug 2013 08:39:07 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: -1 X-BigFish: VS-1(zzbb2dIzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h1155h) Received: from mail7-am1 (localhost.localdomain [127.0.0.1]) by mail7-am1 (MessageSwitch) id 137698794671508_32608; Tue, 20 Aug 2013 08:39:06 +0000 (UTC) Received: from AM1EHSMHS010.bigfish.com (unknown [10.3.201.238]) by mail7-am1.bigfish.com (Postfix) with ESMTP id 03328180041; Tue, 20 Aug 2013 08:39:06 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS010.bigfish.com (10.3.207.110) with Microsoft SMTP Server (TLS) id 14.16.227.3; Tue, 20 Aug 2013 08:39:01 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.3.146.2; Tue, 20 Aug 2013 08:38:59 +0000 Received: from victor.ap.freescale.net (victor.ap.freescale.net [10.192.241.62]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r7K8cZBk029263; Tue, 20 Aug 2013 01:38:57 -0700 From: Liu Ying To: Subject: [PATCH 3/3] staging: drm/imx: ldb: correct the ldb di clock trees Date: Tue, 20 Aug 2013 16:38:52 +0800 Message-ID: <1376987932-5540-4-git-send-email-Ying.Liu@freescale.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1376987932-5540-1-git-send-email-Ying.Liu@freescale.com> References: <1376987932-5540-1-git-send-email-Ying.Liu@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130820_043928_221698_F25597FD X-CRM114-Status: GOOD ( 13.36 ) X-Spam-Score: -2.6 (--) Cc: gregkh@linuxfoundation.org, dri-devel@lists.freedesktop.org, shawn.guo@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In ldb split mode, the ldb_di[0/1]_ipu_div dividers should be configured as clock dividers of 1/3.5, while in others ldb modes of 1/7. This patch gets the di[0/1]_div_3_5, di[0/1]_div_7 and di[0/1]_div_sel clocks and sets the di[0/1]_div_3_5 or di[0/1]_div_7 clocks to be the parents of di[0/1]_div_sel clocks according to the ldb mode. The real dividers are the two fixed factors bewteen the ldb_di[0/1] and the pll clocks, so it's unnecessary to set the frequency for the ldb_di[0/1] clocks again after pll clock frequency is set. This patch removes the redundant clock frequency setting code as well. Signed-off-by: Liu Ying --- drivers/staging/imx-drm/imx-ldb.c | 38 +++++++++++++++++++++++++++++-------- 1 file changed, 30 insertions(+), 8 deletions(-) diff --git a/drivers/staging/imx-drm/imx-ldb.c b/drivers/staging/imx-drm/imx-ldb.c index 8af7f3b..7c553b8 100644 --- a/drivers/staging/imx-drm/imx-ldb.c +++ b/drivers/staging/imx-drm/imx-ldb.c @@ -81,6 +81,9 @@ struct imx_ldb { struct clk *clk[2]; /* our own clock */ struct clk *clk_sel[4]; /* parent of display clock */ struct clk *clk_pll[2]; /* upstream clock we can adjust */ + struct clk *clk_div_3_5[2]; /* fixed factor of 1/3.5 */ + struct clk *clk_div_7[2]; /* fixed factor of 1/7 */ + struct clk *clk_div_sel[2]; /* 1/3.5 or 1/7 */ u32 ldb_ctrl; const struct bus_mux *lvds_mux; }; @@ -150,6 +153,18 @@ static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno, { int ret; + if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) { + ret = clk_set_parent(ldb->clk_div_sel[chno], ldb->clk_div_3_5[chno]); + if (ret) + dev_err(ldb->dev, "unable to set di%d_div_sel parent clock " + "to di%d_div_3_5\n", chno, chno); + } else { + ret = clk_set_parent(ldb->clk_div_sel[chno], ldb->clk_div_7[chno]); + if (ret) + dev_err(ldb->dev, "unable to set di%d_div_sel parent clock " + "to di%d_div_7\n", chno, chno); + } + dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__, clk_get_rate(ldb->clk_pll[chno]), serial_clk); clk_set_rate(ldb->clk_pll[chno], serial_clk); @@ -157,14 +172,6 @@ static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno, dev_dbg(ldb->dev, "%s after: %ld\n", __func__, clk_get_rate(ldb->clk_pll[chno])); - dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__, - clk_get_rate(ldb->clk[chno]), - (long int)di_clk); - clk_set_rate(ldb->clk[chno], di_clk); - - dev_dbg(ldb->dev, "%s after: %ld\n", __func__, - clk_get_rate(ldb->clk[chno])); - /* set display clock mux to LDB input clock */ ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]); if (ret) { @@ -362,6 +369,21 @@ static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno) if (IS_ERR(ldb->clk_pll[chno])) return PTR_ERR(ldb->clk_pll[chno]); + sprintf(clkname, "di%d_div_3_5", chno); + ldb->clk_div_3_5[chno] = devm_clk_get(ldb->dev, clkname); + if (IS_ERR(ldb->clk_div_3_5[chno])) + return PTR_ERR(ldb->clk_div_3_5[chno]); + + sprintf(clkname, "di%d_div_7", chno); + ldb->clk_div_7[chno] = devm_clk_get(ldb->dev, clkname); + if (IS_ERR(ldb->clk_div_7[chno])) + return PTR_ERR(ldb->clk_div_7[chno]); + + sprintf(clkname, "di%d_div_sel", chno); + ldb->clk_div_sel[chno] = devm_clk_get(ldb->dev, clkname); + if (IS_ERR(ldb->clk_div_sel[chno])) + return PTR_ERR(ldb->clk_div_sel[chno]); + return 0; }