Message ID | 1377510981-1793-2-git-send-email-jszhang@marvell.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Dear Jisheng Zhang, On Mon, 26 Aug 2013 17:56:19 +0800, Jisheng Zhang wrote: > diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c > index 97cbb80..8a1ae83 100644 > --- a/arch/arm/mach-mvebu/armada-370-xp.c > +++ b/arch/arm/mach-mvebu/armada-370-xp.c > @@ -64,6 +64,7 @@ static void __init armada_370_xp_mbus_init(void) > ARMADA_370_XP_MBUS_WINS_SIZE, > of_translate_address(dn, &sdram_wins_offs), > ARMADA_370_XP_SDRAM_WINS_SIZE); > + of_node_put(dn); > } With the integration of Ezequiel patches that add DT support to the mvebu-mbus driver, this chunk of the code is no longer needed, as of linux-next. Best regards, Thomas
Dear Thomas, On Mon, 26 Aug 2013 03:02:00 -0700 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote: > Dear Jisheng Zhang, > > On Mon, 26 Aug 2013 17:56:19 +0800, Jisheng Zhang wrote: > > > diff --git a/arch/arm/mach-mvebu/armada-370-xp.c > > b/arch/arm/mach-mvebu/armada-370-xp.c index 97cbb80..8a1ae83 100644 > > --- a/arch/arm/mach-mvebu/armada-370-xp.c > > +++ b/arch/arm/mach-mvebu/armada-370-xp.c > > @@ -64,6 +64,7 @@ static void __init armada_370_xp_mbus_init(void) > > ARMADA_370_XP_MBUS_WINS_SIZE, > > of_translate_address(dn, &sdram_wins_offs), > > ARMADA_370_XP_SDRAM_WINS_SIZE); > > + of_node_put(dn); > > } > > With the integration of Ezequiel patches that add DT support to the > mvebu-mbus driver, this chunk of the code is no longer needed, as of > linux-next. > Got it. Thanks for the information. Will send v4 latter Thanks, Jisheng
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index 97cbb80..8a1ae83 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -64,6 +64,7 @@ static void __init armada_370_xp_mbus_init(void) ARMADA_370_XP_MBUS_WINS_SIZE, of_translate_address(dn, &sdram_wins_offs), ARMADA_370_XP_SDRAM_WINS_SIZE); + of_node_put(dn); } static void __init armada_370_xp_timer_and_clk_init(void) diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c index 4c24303..58adf2f 100644 --- a/arch/arm/mach-mvebu/coherency.c +++ b/arch/arm/mach-mvebu/coherency.c @@ -140,6 +140,7 @@ int __init coherency_init(void) coherency_base = of_iomap(np, 0); coherency_cpu_base = of_iomap(np, 1); set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); + of_node_put(np); } return 0; @@ -147,9 +148,14 @@ int __init coherency_init(void) static int __init coherency_late_init(void) { - if (of_find_matching_node(NULL, of_coherency_table)) + struct device_node *np; + + np = of_find_matching_node(NULL, of_coherency_table); + if (np) { bus_register_notifier(&platform_bus_type, &mvebu_hwcc_platform_nb); + of_node_put(np); + } return 0; } diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c index ce81d30..e7edb82 100644 --- a/arch/arm/mach-mvebu/platsmp.c +++ b/arch/arm/mach-mvebu/platsmp.c @@ -95,6 +95,7 @@ static void __init armada_xp_smp_init_cpus(void) panic("No 'cpus' node found\n"); ncores = of_get_child_count(np); + of_node_put(np); if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS) panic("Invalid number of CPUs in DT\n"); diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 3cc4bef..27fc4f0 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void) pr_info("Initializing Power Management Service Unit\n"); pmsu_mp_base = of_iomap(np, 0); pmsu_reset_base = of_iomap(np, 1); + of_node_put(np); } return 0; diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c index f875124..5175083c 100644 --- a/arch/arm/mach-mvebu/system-controller.c +++ b/arch/arm/mach-mvebu/system-controller.c @@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void) BUG_ON(!match); system_controller_base = of_iomap(np, 0); mvebu_sc = (struct mvebu_system_controller *)match->data; + of_node_put(np); } return 0;