@@ -701,6 +701,7 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
size_t sdramwins_size)
{
int win;
+ struct device_node *np;
mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size);
if (!mbus->mbuswins_base)
@@ -712,8 +713,11 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
return -ENOMEM;
}
- if (of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric"))
+ np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric");
+ if (np) {
mbus->hw_io_coherency = 1;
+ of_node_put(np);
+ }
for (win = 0; win < mbus->soc->num_wins; win++)
mvebu_mbus_disable_window(mbus, win);
@@ -902,23 +906,27 @@ int __init mvebu_mbus_dt_init(void)
prop = of_get_property(np, "controller", NULL);
if (!prop) {
pr_err("required 'controller' property missing\n");
- return -EINVAL;
+ ret = -EINVAL;
+ goto np_out;
}
controller = of_find_node_by_phandle(be32_to_cpup(prop));
if (!controller) {
pr_err("could not find an 'mbus-controller' node\n");
- return -ENODEV;
+ ret = -ENODEV;
+ goto np_out;
}
if (of_address_to_resource(controller, 0, &mbuswins_res)) {
pr_err("cannot get MBUS register address\n");
- return -EINVAL;
+ ret = -EINVAL;
+ goto phandle_out;
}
if (of_address_to_resource(controller, 1, &sdramwins_res)) {
pr_err("cannot get SDRAM register address\n");
- return -EINVAL;
+ ret = -EINVAL;
+ goto phandle_out;
}
/* Get optional pcie-{mem,io}-aperture properties */
@@ -931,9 +939,14 @@ int __init mvebu_mbus_dt_init(void)
sdramwins_res.start,
resource_size(&sdramwins_res));
if (ret)
- return ret;
+ goto phandle_out;
/* Setup statically declared windows in the DT */
- return mbus_dt_setup(&mbus_state, np);
+ ret = mbus_dt_setup(&mbus_state, np);
+phandle_out:
+ of_node_put(controller);
+np_out:
+ of_node_put(np);
+ return ret;
}
#endif