From patchwork Thu Aug 29 02:53:16 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 2851091 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DF3CA9F271 for ; Thu, 29 Aug 2013 02:54:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F2C652037D for ; Thu, 29 Aug 2013 02:54:16 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 392B62030E for ; Thu, 29 Aug 2013 02:54:15 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VEsN8-0000aH-Lv; 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envelope-from=dinguyen@altera.com; helo=SJ-ITEXEDGE02.altera.priv.altera.com ; v.altera.com ; Received: from mail37-co9 (localhost.localdomain [127.0.0.1]) by mail37-co9 (MessageSwitch) id 1377744815192419_9030; Thu, 29 Aug 2013 02:53:35 +0000 (UTC) Received: from CO9EHSMHS032.bigfish.com (unknown [10.236.132.241]) by mail37-co9.bigfish.com (Postfix) with ESMTP id 2A2945C004A; Thu, 29 Aug 2013 02:53:35 +0000 (UTC) Received: from SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) by CO9EHSMHS032.bigfish.com (10.236.130.42) with Microsoft SMTP Server (TLS) id 14.16.227.3; Thu, 29 Aug 2013 02:53:35 +0000 Received: from sj-mail01.altera.com (137.57.1.6) by SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) with Microsoft SMTP Server id 8.3.327.1; Wed, 28 Aug 2013 19:42:39 -0700 Received: from linux-builds1.altera.com (linux-builds1.altera.com [137.57.188.121]) by sj-mail01.altera.com (8.13.7+Sun/8.13.7) with ESMTP id r7T2rFsv007890; Wed, 28 Aug 2013 19:53:18 -0700 (PDT) From: To: Subject: [RESEND PATCHv3 2/2] clocksource: dw_apb_timer_of: Fix read_sched_clock Date: Wed, 28 Aug 2013 21:53:16 -0500 Message-ID: <1377744796-22175-2-git-send-email-dinguyen@altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1377744796-22175-1-git-send-email-dinguyen@altera.com> References: <1377744796-22175-1-git-send-email-dinguyen@altera.com> MIME-Version: 1.0 X-OriginatorOrg: altera.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130828_225404_953357_78A1979D X-CRM114-Status: GOOD ( 14.26 ) X-Spam-Score: -4.2 (----) Cc: Heiko Stuebner , Arnd Bergmann , Pavel Machek , Daniel Lezcano , Rob Herring , John Stultz , linux-arm-kernel@lists.infradead.org, Olof Johansson , Thomas Gleixner , Dinh Nguyen X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dinh Nguyen The read_sched_clock should return the ~value because the clock is a countdown implementation. read_sched_clock() should be the same as __apbt_read_clocksource(). If a separate timer for the sched_clock exist, then read_sched_clock() will return an incorrect value. The (sched_io_base + 0x4) needs to be in the function for both cases. Maintain backwards compatibility for "dw-apb-timer-sp" and "dw-apb-timer-osc". Signed-off-by: Dinh Nguyen Acked-by: Jamie Iles Acked-by: Linus Walleij CC: Rob Herring CC: Arnd Bergmann Cc: Olof Johansson Cc: John Stultz Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Pavel Machek Cc: Heiko Stuebner Cc: linux-arm-kernel@lists.infradead.org v3: - Use APBTMR_N_CURRENT_VALUE define in read_sched_clock() v2: - Maintain backwards compatibility for "dw-apb-timer-sp" and "dw-apb-timer-osc". --- drivers/clocksource/dw_apb_timer_of.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c index 4cbae4f..01c1238 100644 --- a/drivers/clocksource/dw_apb_timer_of.c +++ b/drivers/clocksource/dw_apb_timer_of.c @@ -102,18 +102,17 @@ static void add_clocksource(struct device_node *source_timer) * timer is found. sched_io_base then points to the current_value * register of the clocksource timer. */ - sched_io_base = iobase + 0x04; + sched_io_base = iobase; sched_rate = rate; } static u32 read_sched_clock(void) { - return __raw_readl(sched_io_base); + return ~__raw_readl(sched_io_base + APBTMR_N_CURRENT_VALUE); } static const struct of_device_id sptimer_ids[] __initconst = { { .compatible = "picochip,pc3x2-rtc" }, - { .compatible = "snps,dw-apb-timer-sp" }, { /* Sentinel */ }, }; @@ -153,4 +152,6 @@ static void __init dw_apb_timer_init(struct device_node *timer) num_called++; } CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init); -CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer-osc", dw_apb_timer_init); +CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init); +CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init); +CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);