@@ -87,6 +87,13 @@ config CLK_PPC_CORENET
This adds the clock driver support for Freescale PowerPC corenet
platforms using common clock framework.
+config COMMON_CLK_KEYSTONE
+ tristate "Clock drivers for Keystone based SOCs"
+ depends on ARCH_KEYSTONE && OF
+ ---help---
+ Supports clock drivers for Keystone based SOCs. These SOCs have local
+ a power sleep control module that gate the clock to the IPs and PLLs.
+
endmenu
source "drivers/clk/mvebu/Kconfig"
@@ -32,6 +32,7 @@ obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
obj-$(CONFIG_ARCH_ZYNQ) += zynq/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_PLAT_SAMSUNG) += samsung/
+obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/
obj-$(CONFIG_X86) += x86/
new file mode 100644
@@ -0,0 +1 @@
+obj-y += pll.o gate.o
Now build the keystone common clock drivers. The build is made conditional based on COMMON_CLK_KEYSTONE Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- drivers/clk/Kconfig | 7 +++++++ drivers/clk/Makefile | 1 + drivers/clk/keystone/Makefile | 1 + 3 files changed, 9 insertions(+) create mode 100644 drivers/clk/keystone/Makefile