From patchwork Sat Sep 28 19:27:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylwester Nawrocki X-Patchwork-Id: 2958891 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8FFA2BFF0B for ; Sat, 28 Sep 2013 19:30:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8877920218 for ; Sat, 28 Sep 2013 19:30:20 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6E86520211 for ; Sat, 28 Sep 2013 19:30:19 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VQ0DI-0001F0-S3; Sat, 28 Sep 2013 19:30:01 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VQ0DB-0007sM-EF; Sat, 28 Sep 2013 19:29:53 +0000 Received: from mail-ea0-x22a.google.com ([2a00:1450:4013:c01::22a]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VQ0Cz-0007qD-NO for linux-arm-kernel@lists.infradead.org; Sat, 28 Sep 2013 19:29:44 +0000 Received: by mail-ea0-f170.google.com with SMTP id h14so1852042eak.29 for ; Sat, 28 Sep 2013 12:29:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=48vwRYYMGrh13SzI9hn5qRTZAL7EW847fzcL+ze5mgM=; b=Q5SX4+Vs5EMOMMwYvpcrVvgabc+6crXUak7xrmrk+t03m4ZFLGJA7f0YcouPZQvD9I gStcoCbeir1gB6rVxAqh+uXnlx2aFd1Ae3plIY/VpFBZnv9hFv4WIneMd7v2AsBRrXX8 xrZjNCPSHk9s2ej3+KyMbveObdVOmuxTmlhV7qQVspCSTfonnAZJLK8YV9kRrO/4aPTH HvZiLJbJE69+xjND9gPdBscSqJPBEwQZh8zu3nuRpfewkNFBWKuOs89iEhls3517zt5g APuVlm4I+PSLiIwHhE3kp+4l5sTUWJ+jtmxwMN6qUtAGH26C79AOPv5WFYkkMPtDRnCm jntQ== X-Received: by 10.15.98.194 with SMTP id bj42mr22245840eeb.12.1380396558909; Sat, 28 Sep 2013 12:29:18 -0700 (PDT) Received: from localhost.localdomain (093105185086.warszawa.vectranet.pl. [93.105.185.86]) by mx.google.com with ESMTPSA id f49sm30969241eec.7.1969.12.31.16.00.00 (version=TLSv1 cipher=RC4-SHA bits=128/128); Sat, 28 Sep 2013 12:29:18 -0700 (PDT) From: Sylwester Nawrocki To: kishon@ti.com Subject: [PATCH V5 2/5] phy: Add driver for Exynos MIPI CSIS/DSIM DPHYs Date: Sat, 28 Sep 2013 21:27:44 +0200 Message-Id: <1380396467-29278-3-git-send-email-s.nawrocki@samsung.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1380396467-29278-1-git-send-email-s.nawrocki@samsung.com> References: <1380396467-29278-1-git-send-email-s.nawrocki@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130928_152942_078214_7DD11F22 X-CRM114-Status: GOOD ( 22.56 ) X-Spam-Score: 1.4 (+) Cc: linux-fbdev@vger.kernel.org, kgene.kim@samsung.com, gregkh@linuxfoundation.org, jg1.han@samsung.com, dh09.lee@samsung.com, linux-samsung-soc@vger.kernel.org, kyungmin.park@samsung.com, tomi.valkeinen@ti.com, Sylwester Nawrocki , plagnioj@jcrosoft.com, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a PHY provider driver for the Samsung S5P/Exynos SoC MIPI CSI-2 receiver and MIPI DSI transmitter DPHYs. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park --- Changes since v4: - updated to latest version of the PHY framework - removed PHY labels. The individual driver symbols in drivers/phy/Kconfig should presumably be prefixed with, e.g. PHY_. This is something that perhaps could be done as a follow up patch. --- .../devicetree/bindings/phy/samsung-phy.txt | 14 ++ drivers/phy/Kconfig | 6 + drivers/phy/Makefile | 7 +- drivers/phy/phy-exynos-mipi-video.c | 176 ++++++++++++++++++++ 4 files changed, 200 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/samsung-phy.txt create mode 100644 drivers/phy/phy-exynos-mipi-video.c diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt new file mode 100644 index 0000000..5ff208c --- /dev/null +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -0,0 +1,14 @@ +Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY +------------------------------------------------- + +Required properties: +- compatible : should be "samsung,s5pv210-mipi-video-phy"; +- reg : offset and length of the MIPI DPHY register set; +- #phy-cells : from the generic phy bindings, must be 1; + +For "samsung,s5pv210-mipi-video-phy" compatible PHYs the second cell in +the PHY specifier identifies the PHY and its meaning is as follows: + 0 - MIPI CSIS 0, + 1 - MIPI DSIM 0, + 2 - MIPI CSIS 1, + 3 - MIPI DSIM 1. diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index ac239ac..0062d7e 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -15,6 +15,12 @@ config GENERIC_PHY phy users can obtain reference to the PHY. All the users of this framework should select this config. +config PHY_EXYNOS_MIPI_VIDEO + tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver" + help + Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P + and EXYNOS SoCs. + config OMAP_USB2 tristate "OMAP USB2 PHY Driver" depends on ARCH_OMAP2PLUS diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 0dd8a98..6344053 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -2,6 +2,7 @@ # Makefile for the phy drivers. # -obj-$(CONFIG_GENERIC_PHY) += phy-core.o -obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o -obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o +obj-$(CONFIG_GENERIC_PHY) += phy-core.o +obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o +obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o +obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c new file mode 100644 index 0000000..b73b86a --- /dev/null +++ b/drivers/phy/phy-exynos-mipi-video.c @@ -0,0 +1,176 @@ +/* + * Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver + * + * Copyright (C) 2013 Samsung Electronics Co., Ltd. + * Author: Sylwester Nawrocki + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* MIPI_PHYn_CONTROL register offset: n = 0..1 */ +#define EXYNOS_MIPI_PHY_CONTROL(n) ((n) * 4) +#define EXYNOS_MIPI_PHY_ENABLE (1 << 0) +#define EXYNOS_MIPI_PHY_SRESETN (1 << 1) +#define EXYNOS_MIPI_PHY_MRESETN (1 << 2) +#define EXYNOS_MIPI_PHY_RESET_MASK (3 << 1) + +enum exynos_mipi_phy_id { + EXYNOS_MIPI_PHY_ID_CSIS0, + EXYNOS_MIPI_PHY_ID_DSIM0, + EXYNOS_MIPI_PHY_ID_CSIS1, + EXYNOS_MIPI_PHY_ID_DSIM1, + EXYNOS_MIPI_PHYS_NUM +}; + +#define is_mipi_dsim_phy_id(id) \ + ((id) == EXYNOS_MIPI_PHY_ID_DSIM0 || (id) == EXYNOS_MIPI_PHY_ID_DSIM1) + +struct exynos_mipi_video_phy { + spinlock_t slock; + struct video_phy_desc { + struct phy *phy; + unsigned int index; + } phys[EXYNOS_MIPI_PHYS_NUM]; + void __iomem *regs; +}; + +static int __set_phy_state(struct exynos_mipi_video_phy *state, + enum exynos_mipi_phy_id id, unsigned int on) +{ + void __iomem *addr; + u32 reg, reset; + + addr = state->regs + EXYNOS_MIPI_PHY_CONTROL(id / 2); + + if (is_mipi_dsim_phy_id(id)) + reset = EXYNOS_MIPI_PHY_MRESETN; + else + reset = EXYNOS_MIPI_PHY_SRESETN; + + spin_lock(&state->slock); + reg = readl(addr); + if (on) + reg |= reset; + else + reg &= ~reset; + writel(reg, addr); + + /* Clear ENABLE bit only if MRESETN, SRESETN bits are not set. */ + if (on) + reg |= EXYNOS_MIPI_PHY_ENABLE; + else if (!(reg & EXYNOS_MIPI_PHY_RESET_MASK)) + reg &= ~EXYNOS_MIPI_PHY_ENABLE; + + writel(reg, addr); + spin_unlock(&state->slock); + return 0; +} + +#define to_mipi_video_phy(desc) \ + container_of((desc), struct exynos_mipi_video_phy, phys[(desc)->index]); + +static int exynos_mipi_video_phy_power_on(struct phy *phy) +{ + struct video_phy_desc *phy_desc = phy_get_drvdata(phy); + struct exynos_mipi_video_phy *state = to_mipi_video_phy(phy_desc); + + return __set_phy_state(state, phy_desc->index, 1); +} + +static int exynos_mipi_video_phy_power_off(struct phy *phy) +{ + struct video_phy_desc *phy_desc = phy_get_drvdata(phy); + struct exynos_mipi_video_phy *state = to_mipi_video_phy(phy_desc); + + return __set_phy_state(state, phy_desc->index, 1); +} + +static struct phy *exynos_mipi_video_phy_xlate(struct device *dev, + struct of_phandle_args *args) +{ + struct exynos_mipi_video_phy *state = dev_get_drvdata(dev); + + if (WARN_ON(args->args[0] > EXYNOS_MIPI_PHYS_NUM)) + return ERR_PTR(-ENODEV); + + return state->phys[args->args[0]].phy; +} + +static struct phy_ops exynos_mipi_video_phy_ops = { + .power_on = exynos_mipi_video_phy_power_on, + .power_off = exynos_mipi_video_phy_power_off, + .owner = THIS_MODULE, +}; + +static int exynos_mipi_video_phy_probe(struct platform_device *pdev) +{ + struct exynos_mipi_video_phy *state; + struct device *dev = &pdev->dev; + struct resource *res; + struct phy_provider *phy_provider; + unsigned int i; + + state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); + if (!state) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + state->regs = devm_ioremap_resource(dev, res); + if (IS_ERR(state->regs)) + return PTR_ERR(state->regs); + + dev_set_drvdata(dev, state); + spin_lock_init(&state->slock); + + phy_provider = devm_of_phy_provider_register(dev, + exynos_mipi_video_phy_xlate); + if (IS_ERR(phy_provider)) + return PTR_ERR(phy_provider); + + for (i = 0; i < EXYNOS_MIPI_PHYS_NUM; i++) { + struct phy *phy = devm_phy_create(dev, + &exynos_mipi_video_phy_ops, NULL); + if (IS_ERR(phy)) { + dev_err(dev, "failed to create PHY %d\n", i); + return PTR_ERR(phy); + } + + state->phys[i].phy = phy; + state->phys[i].index = i; + phy_set_drvdata(phy, &state->phys[i]); + } + + return 0; +} + +static const struct of_device_id exynos_mipi_video_phy_of_match[] = { + { .compatible = "samsung,s5pv210-mipi-video-phy" }, + { }, +}; +MODULE_DEVICE_TABLE(of, exynos_mipi_video_phy_of_match); + +static struct platform_driver exynos_mipi_video_phy_driver = { + .probe = exynos_mipi_video_phy_probe, + .driver = { + .of_match_table = exynos_mipi_video_phy_of_match, + .name = "exynos-mipi-video-phy", + .owner = THIS_MODULE, + } +}; +module_platform_driver(exynos_mipi_video_phy_driver); + +MODULE_DESCRIPTION("Samsung S5P/EXYNOS SoC MIPI CSI-2/DSI PHY driver"); +MODULE_AUTHOR("Sylwester Nawrocki "); +MODULE_LICENSE("GPL v2");