@@ -246,6 +246,13 @@
reg = <0x01c200b0 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
};
+
+ mbus: mbus@01c2015c {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-mod0-clk";
+ reg = <0x01c2015c 0x4>;
+ clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
+ };
};
soc@01c00000 {
@@ -247,6 +247,13 @@
reg = <0x01c200b0 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
};
+
+ mbus: mbus@01c2015c {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-mod0-clk";
+ reg = <0x01c2015c 0x4>;
+ clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
+ };
};
soc@01c00000 {
@@ -275,6 +275,13 @@
reg = <0x01c200d4 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
};
+
+ mbus: mbus@01c2015c {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-mod0-clk";
+ reg = <0x01c2015c 0x4>;
+ clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
+ };
};
soc@01c00000 {
mbus is the memory bus clock, and it is present on both sun5i and sun7i machines. Its register layout is compatible with the mod0 one. Signed-off-by: Emilio López <emilio@elopez.com.ar> --- arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +++++++ arch/arm/boot/dts/sun5i-a13.dtsi | 7 +++++++ arch/arm/boot/dts/sun7i-a20.dtsi | 7 +++++++ 3 files changed, 21 insertions(+)