| Message ID | 1380983960-11087-5-git-send-email-maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Maxime, El 05/10/13 11:39, Maxime Ripard escribió: > The A31 has a reset controller IP that maintains a few other IPs in > reset, among which we can find the UARTs, high speed timers or the I2C. > Now that we have support for them, add the reset controllers to the DTSI. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > --- > arch/arm/boot/dts/sun6i-a31.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi > index f244f5f..c99c946 100644 > --- a/arch/arm/boot/dts/sun6i-a31.dtsi > +++ b/arch/arm/boot/dts/sun6i-a31.dtsi > @@ -209,6 +209,24 @@ > }; > }; > > + ahb1_rst: reset@01c202c0 { > + #reset-cells = <1>; > + compatible = "allwinner,sun6i-a31-ahb1-reset"; > + reg = <0x01c202c0 0xc>; > + }; > + > + apb1_rst: reset@01c202d0 { > + #reset-cells = <1>; > + compatible = "allwinner,sun6i-a31-apb1-reset"; > + reg = <0x01c202d0 0x4>; > + }; > + > + apb2_rst: reset@01c202d8 { > + #reset-cells = <1>; > + compatible = "allwinner,sun6i-a31-apb2-reset"; > + reg = <0x01c202d8 0x4>; > + }; > + > timer@01c20c00 { > compatible = "allwinner,sun4i-timer"; > reg = <0x01c20c00 0xa0>; > @@ -232,6 +250,7 @@ > reg-shift = <2>; > reg-io-width = <4>; > clocks = <&apb2_gates 16>; > + resets = <&apb2_rst 16>; > status = "disabled"; > }; > > @@ -242,6 +261,7 @@ > reg-shift = <2>; > reg-io-width = <4>; > clocks = <&apb2_gates 17>; > + resets = <&apb2_rst 17>; > status = "disabled"; > }; > > @@ -252,6 +272,7 @@ > reg-shift = <2>; > reg-io-width = <4>; > clocks = <&apb2_gates 18>; > + resets = <&apb2_rst 18>; > status = "disabled"; > }; > > @@ -262,6 +283,7 @@ > reg-shift = <2>; > reg-io-width = <4>; > clocks = <&apb2_gates 19>; > + resets = <&apb2_rst 19>; > status = "disabled"; > }; > > @@ -272,6 +294,7 @@ > reg-shift = <2>; > reg-io-width = <4>; > clocks = <&apb2_gates 20>; > + resets = <&apb2_rst 20>; > status = "disabled"; > }; > > @@ -282,6 +305,7 @@ > reg-shift = <2>; > reg-io-width = <4>; > clocks = <&apb2_gates 21>; > + resets = <&apb2rst 21>; You have a typo here (missing _) which breaks the dt build > status = "disabled"; > }; > > Cheers, Emilio
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index f244f5f..c99c946 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -209,6 +209,24 @@ }; }; + ahb1_rst: reset@01c202c0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-ahb1-reset"; + reg = <0x01c202c0 0xc>; + }; + + apb1_rst: reset@01c202d0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-apb1-reset"; + reg = <0x01c202d0 0x4>; + }; + + apb2_rst: reset@01c202d8 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-apb2-reset"; + reg = <0x01c202d8 0x4>; + }; + timer@01c20c00 { compatible = "allwinner,sun4i-timer"; reg = <0x01c20c00 0xa0>; @@ -232,6 +250,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 16>; + resets = <&apb2_rst 16>; status = "disabled"; }; @@ -242,6 +261,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 17>; + resets = <&apb2_rst 17>; status = "disabled"; }; @@ -252,6 +272,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 18>; + resets = <&apb2_rst 18>; status = "disabled"; }; @@ -262,6 +283,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 19>; + resets = <&apb2_rst 19>; status = "disabled"; }; @@ -272,6 +294,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 20>; + resets = <&apb2_rst 20>; status = "disabled"; }; @@ -282,6 +305,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 21>; + resets = <&apb2rst 21>; status = "disabled"; };
The A31 has a reset controller IP that maintains a few other IPs in reset, among which we can find the UARTs, high speed timers or the I2C. Now that we have support for them, add the reset controllers to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- arch/arm/boot/dts/sun6i-a31.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)