From patchwork Sun Oct 6 22:30:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Fernandes X-Patchwork-Id: 2993471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 03B1ABF924 for ; Sun, 6 Oct 2013 22:32:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 19A91201F4 for ; Sun, 6 Oct 2013 22:32:18 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC40C201EF for ; Sun, 6 Oct 2013 22:32:16 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VSwry-0002rA-8k; Sun, 06 Oct 2013 22:32:10 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VSwrv-0004ut-Kz; Sun, 06 Oct 2013 22:32:07 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VSwrs-0004uY-N5 for linux-arm-kernel@lists.infradead.org; Sun, 06 Oct 2013 22:32:05 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r96MVLHg023965; Sun, 6 Oct 2013 17:31:21 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r96MVL6d024469; Sun, 6 Oct 2013 17:31:21 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Sun, 6 Oct 2013 17:31:20 -0500 Received: from joel-laptop.am.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id r96MVJQw019387; Sun, 6 Oct 2013 17:31:20 -0500 From: Joel Fernandes To: , , Subject: [RFC] ARM: kernel: irq: Simplify allocation of stack frame Date: Sun, 6 Oct 2013 17:30:47 -0500 Message-ID: <1381098649-21417-1-git-send-email-joelf@ti.com> X-Mailer: git-send-email 1.8.1.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131006_183204_843504_31ACC867 X-CRM114-Status: GOOD ( 11.13 ) X-Spam-Score: -6.9 (------) Cc: =?UTF-8?q?Andr=C3=A9=20Hentschel?= , Russell King , Jonathan Austin , Nicolas Pitre , Joel Fernandes , Santosh Shilimkar X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On receiving IRQ exception in SVC mode, all the SVC mode registers are saved onto the stack very early on. The stack frame allocation code for IRQ entry during SVC mode (svc_entry) is hard to read as 4-less is allocated initially only to be allocated later implicity using the mov r3, [sp, #-4]! instruction. We make code easier to read by allocating the 4 bytes on the stack frame in the beginning itself and remove all instances where 4 bytes is adjusted. Cc: Russell King Cc: Nicolas Pitre Cc: Santosh Shilimkar Signed-off-by: Joel Fernandes --- arch/arm/kernel/entry-armv.S | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 9cbe70c..fc5ac2a 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -149,7 +149,7 @@ ENDPROC(__und_invalid) .macro svc_entry, stack_hole=0 UNWIND(.fnstart ) UNWIND(.save {r0 - pc} ) - sub sp, sp, #(S_FRAME_SIZE + \stack_hole - 4) + sub sp, sp, #(S_FRAME_SIZE + \stack_hole) #ifdef CONFIG_THUMB2_KERNEL SPFIX( str r0, [sp] ) @ temporarily saved SPFIX( mov r0, sp ) @@ -159,14 +159,14 @@ ENDPROC(__und_invalid) SPFIX( tst sp, #4 ) #endif SPFIX( subeq sp, sp, #4 ) - stmia sp, {r1 - r12} + stmia sp, {r0 - r12} ldmia r0, {r3 - r5} - add r7, sp, #S_SP - 4 @ here for interlock avoidance + add r7, sp, #S_SP @ here for interlock avoidance mov r6, #-1 @ "" "" "" "" - add r2, sp, #(S_FRAME_SIZE + \stack_hole - 4) + add r2, sp, #(S_FRAME_SIZE + \stack_hole) SPFIX( addeq r2, r2, #4 ) - str r3, [sp, #-4]! @ save the "real" r0 copied + str r3, [sp] @ save the "real" r0 copied @ from the exception stack mov r3, lr