From patchwork Wed Oct 9 09:20:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 3007881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 333D6BF924 for ; Wed, 9 Oct 2013 09:23:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 17F5F20134 for ; Wed, 9 Oct 2013 09:23:48 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C842B20124 for ; Wed, 9 Oct 2013 09:23:46 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VTpxt-0004kq-Il; Wed, 09 Oct 2013 09:21:58 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VTpxT-0004vo-Ne; Wed, 09 Oct 2013 09:21:31 +0000 Received: from hqemgate16.nvidia.com ([216.228.121.65]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VTpx0-0004q1-NY for linux-arm-kernel@lists.infradead.org; Wed, 09 Oct 2013 09:21:04 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Wed, 09 Oct 2013 02:20:37 -0700 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Wed, 09 Oct 2013 02:16:29 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Wed, 09 Oct 2013 02:16:29 -0700 Received: from jlo-ubuntu-64.nvidia.com (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.327.1; Wed, 9 Oct 2013 02:20:37 -0700 From: Joseph Lo To: Stephen Warren Subject: [PATCH 5/7] ARM: tegra: hook the LP1 iram code area and sleep_core function for Tegra124 Date: Wed, 9 Oct 2013 17:20:09 +0800 Message-ID: <1381310411-11391-6-git-send-email-josephl@nvidia.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1381310411-11391-1-git-send-email-josephl@nvidia.com> References: <1381310411-11391-1-git-send-email-josephl@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131009_052102_963123_897B11C3 X-CRM114-Status: GOOD ( 10.53 ) X-Spam-Score: -2.1 (--) Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To support LP1, we need to hook sleep_core function. That will turn off MMU and jump to the IRAM to execute the rest of LP1 suspend function. And we need the the LP1 IRAM addr to backup the original content and replace it with LP1 low level support code. Signed-off-by: Joseph Lo --- arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/pm.c | 8 ++++++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index de3748e..019bb17 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -36,6 +36,7 @@ ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_114_SOC) += cpuidle-tegra114.o endif obj-$(CONFIG_ARCH_TEGRA_124_SOC) += sleep-tegra30.o +obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_124_SOC) += cpuidle-tegra114.o endif diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 14e75b7..4ae0286 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -218,8 +218,10 @@ static bool tegra_lp1_iram_hook(void) break; case TEGRA30: case TEGRA114: + case TEGRA124: if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) || - IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC)) + IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || + IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)) tegra30_lp1_iram_hook(); break; default: @@ -246,8 +248,10 @@ static bool tegra_sleep_core_init(void) break; case TEGRA30: case TEGRA114: + case TEGRA124: if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) || - IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC)) + IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || + IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)) tegra30_sleep_core_init(); break; default: