From patchwork Mon Oct 14 13:53:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 3036521 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id ADB6FBF924 for ; Mon, 14 Oct 2013 13:54:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3DBF220253 for ; Mon, 14 Oct 2013 13:54:06 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2DF6A20221 for ; Mon, 14 Oct 2013 13:54:01 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VViar-0000ve-5N; Mon, 14 Oct 2013 13:53:57 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VViao-0006t4-R3; Mon, 14 Oct 2013 13:53:54 +0000 Received: from mail-wi0-f173.google.com ([209.85.212.173]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VVial-0006ro-Ty for linux-arm-kernel@lists.infradead.org; Mon, 14 Oct 2013 13:53:53 +0000 Received: by mail-wi0-f173.google.com with SMTP id h11so2216190wiv.6 for ; Mon, 14 Oct 2013 06:53:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Ksn3V2KpO/aXOd9sspAABUwX4uXLUFshmRCl1+QAry8=; b=mtqjGI0VB2kEra0OI18N+TlvqADDGZqjBC95FTbhA38Hohc+S62AQl0rNxoGDBB7jg lsoYW0quJsXPwXu2plFwcMtyi4vQAtToHI2ws0LTfo7dO7Uo++7BHiV4Zc6k/HTW6WlS +8dx76EzsJDRWdg1e9oU7rrNUOGEcHG5tlgsCJ8qtkLkBzIo5EvPYfOckOCClAS5pA17 Gz2XhHlyeZU2PJZmBzBdEchjcxqFmb4eGvWt+U3Qc76LsnnP54Vw55j4Mim5EAHYpZ73 6WnrGNAwXsf1GCr8zn6TrOd7vev9Mn1klTpFYOLFev7xlsruRc6XlUDdJkBSbCQMGe6m qMVg== X-Gm-Message-State: ALoCoQnOzbzba4SO1Z0gWjx/jXT6nY+AVtc2kSpReaXQr7xhus8bIc9kUECtcBmUqbhntWF1J/pv X-Received: by 10.180.182.68 with SMTP id ec4mr14828901wic.40.1381758809754; Mon, 14 Oct 2013 06:53:29 -0700 (PDT) Received: from mai.home (AToulouse-654-1-457-225.w83-205.abo.wanadoo.fr. [83.205.200.225]) by mx.google.com with ESMTPSA id jf2sm34566337wic.2.1969.12.31.16.00.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 14 Oct 2013 06:53:29 -0700 (PDT) From: Daniel Lezcano To: rostedt@goodmis.org, fweisbec@gmail.com, mingo@redhat.com Subject: [PATCH] ARM: trace: Add tracepoint for the Inter Processor Interrupt Date: Mon, 14 Oct 2013 15:53:27 +0200 Message-Id: <1381758807-31139-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131014_095352_204258_EC14832E X-CRM114-Status: GOOD ( 18.82 ) X-Spam-Score: -2.6 (--) Cc: linaro-kernel@lists.linaro.org, shaojie.sun@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Inter Processor Interrupt is used on ARM to tell another processor to do a specific action. This is mainly used to emulate a timer interrupt on an idle cpu, force a cpu to reschedule or run a function on another processor context. Add a tracepoint when raising an IPI and in the entry/exit handler function. Signed-off-by: Daniel Lezcano --- arch/arm/include/asm/smp.h | 9 ++++ arch/arm/kernel/smp.c | 34 ++++++++------ arch/arm64/include/asm/smp.h | 7 +++ arch/arm64/kernel/smp.c | 21 +++++++-- include/trace/events/ipi.h | 106 ++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 158 insertions(+), 19 deletions(-) create mode 100644 include/trace/events/ipi.h diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index a8cae71c..788706c 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -18,6 +18,15 @@ # error " included in non-SMP build" #endif +enum ipi_msg_type { + IPI_WAKEUP, + IPI_TIMER, + IPI_RESCHEDULE, + IPI_CALL_FUNC, + IPI_CALL_FUNC_SINGLE, + IPI_CPU_STOP, +}; + #define raw_smp_processor_id() (current_thread_info()->cpu) struct seq_file; diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 72024ea..9ca8ce8 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -46,6 +46,9 @@ #include #include +#define CREATE_TRACE_POINTS +#include + /* * as from 2.5, kernels no longer have an init_tasks structure * so we need some other way of telling a new secondary core @@ -59,15 +62,6 @@ struct secondary_data secondary_data; */ volatile int pen_release = -1; -enum ipi_msg_type { - IPI_WAKEUP, - IPI_TIMER, - IPI_RESCHEDULE, - IPI_CALL_FUNC, - IPI_CALL_FUNC_SINGLE, - IPI_CPU_STOP, -}; - static DECLARE_COMPLETION(cpu_running); static struct smp_operations smp_ops; @@ -433,19 +427,25 @@ void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) smp_cross_call = fn; } +static void ipi_raise(const struct cpumask *mask, int ipinr) +{ + trace_ipi_raise(mask, ipinr); + smp_cross_call(mask, ipinr); +} + void arch_send_call_function_ipi_mask(const struct cpumask *mask) { - smp_cross_call(mask, IPI_CALL_FUNC); + ipi_raise(mask, IPI_CALL_FUNC); } void arch_send_wakeup_ipi_mask(const struct cpumask *mask) { - smp_cross_call(mask, IPI_WAKEUP); + ipi_raise(mask, IPI_WAKEUP); } void arch_send_call_function_single_ipi(int cpu) { - smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); + ipi_raise(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); } static const char *ipi_types[NR_IPI] = { @@ -487,7 +487,7 @@ u64 smp_irq_stat_cpu(unsigned int cpu) #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST void tick_broadcast(const struct cpumask *mask) { - smp_cross_call(mask, IPI_TIMER); + ipi_raise(mask, IPI_TIMER); } #endif @@ -528,6 +528,8 @@ void handle_IPI(int ipinr, struct pt_regs *regs) unsigned int cpu = smp_processor_id(); struct pt_regs *old_regs = set_irq_regs(regs); + trace_ipi_handler_entry(ipinr); + if (ipinr < NR_IPI) __inc_irq_stat(cpu, ipi_irqs[ipinr]); @@ -571,11 +573,13 @@ void handle_IPI(int ipinr, struct pt_regs *regs) break; } set_irq_regs(old_regs); + + trace_ipi_handler_exit(ipinr); } void smp_send_reschedule(int cpu) { - smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); + ipi_raise(cpumask_of(cpu), IPI_RESCHEDULE); } void smp_send_stop(void) @@ -586,7 +590,7 @@ void smp_send_stop(void) cpumask_copy(&mask, cpu_online_mask); cpumask_clear_cpu(smp_processor_id(), &mask); if (!cpumask_empty(&mask)) - smp_cross_call(&mask, IPI_CPU_STOP); + ipi_raise(&mask, IPI_CPU_STOP); /* Wait up to one second for other CPUs to stop */ timeout = USEC_PER_SEC; diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h index 4b8023c..7ebaa3a 100644 --- a/arch/arm64/include/asm/smp.h +++ b/arch/arm64/include/asm/smp.h @@ -24,6 +24,13 @@ # error " included in non-SMP build" #endif +enum ipi_msg_type { + IPI_RESCHEDULE, + IPI_CALL_FUNC, + IPI_CALL_FUNC_SINGLE, + IPI_CPU_STOP, +}; + #define raw_smp_processor_id() (current_thread_info()->cpu) struct seq_file; diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 78db90d..c987b9f 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -48,6 +48,9 @@ #include #include +#define CREATE_TRACE_POINTS +#include + /* * as from 2.5, kernels no longer have an init_tasks structure * so we need some other way of telling a new secondary core @@ -426,14 +429,20 @@ void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) smp_cross_call = fn; } +static void ipi_raise(const struct cpumask *mask, int ipinr) +{ + trace_ipi_raise(mask, ipinr); + smp_cross_call(mask, ipinr); +} + void arch_send_call_function_ipi_mask(const struct cpumask *mask) { - smp_cross_call(mask, IPI_CALL_FUNC); + ipi_raise(mask, IPI_CALL_FUNC); } void arch_send_call_function_single_ipi(int cpu) { - smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); + ipi_raise(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); } static const char *ipi_types[NR_IPI] = { @@ -501,6 +510,8 @@ void handle_IPI(int ipinr, struct pt_regs *regs) unsigned int cpu = smp_processor_id(); struct pt_regs *old_regs = set_irq_regs(regs); + trace_ipi_handler_entry(ipinr); + if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI) __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]); @@ -532,11 +543,13 @@ void handle_IPI(int ipinr, struct pt_regs *regs) break; } set_irq_regs(old_regs); + + trace_ipi_handler_exit(ipinr); } void smp_send_reschedule(int cpu) { - smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); + ipi_raise(cpumask_of(cpu), IPI_RESCHEDULE); } void smp_send_stop(void) @@ -549,7 +562,7 @@ void smp_send_stop(void) cpumask_copy(&mask, cpu_online_mask); cpu_clear(smp_processor_id(), mask); - smp_cross_call(&mask, IPI_CPU_STOP); + ipi_raise(&mask, IPI_CPU_STOP); } /* Wait up to one second for other CPUs to stop */ diff --git a/include/trace/events/ipi.h b/include/trace/events/ipi.h new file mode 100644 index 0000000..4d6648a --- /dev/null +++ b/include/trace/events/ipi.h @@ -0,0 +1,106 @@ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM ipi + +#if !defined(_TRACE_IPI_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_IPI_H + +#include + +struct cpumask; + +#define ipi_name(ipinr) { IPI_##ipinr, #ipinr } +#define show_ipi_name(val) \ + __print_symbolic(val, \ + ipi_name(WAKEUP), \ + ipi_name(TIMER), \ + ipi_name(RESCHEDULE), \ + ipi_name(CALL_FUNC), \ + ipi_name(CALL_FUNC_SINGLE), \ + ipi_name(CPU_STOP)) + +/** + * ipi_handle_entry - called right before the IPI handler + * @ipinr: the IPI number + * + * The @ipinr value must be valid and the action name associated with + * the IPI value is given in the trace. + */ +TRACE_EVENT_CONDITION(ipi_handler_entry, + + TP_PROTO(int ipinr), + + TP_ARGS(ipinr), + + TP_CONDITION(ipinr < NR_IPI && ipinr >= 0), + + TP_STRUCT__entry( + __field(unsigned int, ipinr) + ), + + TP_fast_assign( + __entry->ipinr = ipinr; + ), + + TP_printk("ipi=%d, name=%s", __entry->ipinr, + show_ipi_name(__entry->ipinr)) +); + +/** + * ipi_handle_exit - called right after the IPI handler + * @ipinr: the IPI number + * + * The @ipinr value must be valid and the action name associated with + * the IPI value is given in the trace. + */ +TRACE_EVENT_CONDITION(ipi_handler_exit, + + TP_PROTO(int ipinr), + + TP_ARGS(ipinr), + + TP_CONDITION(ipinr < NR_IPI && ipinr >= 0), + + TP_STRUCT__entry( + __field(int, ipinr) + ), + + TP_fast_assign( + __entry->ipinr = ipinr; + ), + + TP_printk("ipi=%d, name=%s", __entry->ipinr, + show_ipi_name(__entry->ipinr)) +); + +/** + * ipi_raise - called when a smp cross call is made + * @ipinr: the IPI number + * @cpumask: the recipients for the IPI + * + * The @ipinr value must be valid and the action name associated with + * the IPI value is given in the trace. + */ +TRACE_EVENT_CONDITION(ipi_raise, + + TP_PROTO(const struct cpumask *cpumask, int ipinr), + + TP_ARGS(cpumask, ipinr), + + TP_CONDITION(ipinr < NR_IPI && ipinr >= 0), + + TP_STRUCT__entry( + __field(int, ipinr) + ), + + TP_fast_assign( + __entry->ipinr = ipinr; + ), + + TP_printk("ipi=%d, name=%s", __entry->ipinr, + show_ipi_name(__entry->ipinr)) +); + +#endif /* _TRACE_IPI_H */ + +/* This part must be outside protection */ +#include