From patchwork Fri Oct 25 13:07:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 3095721 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 84B5FBF924 for ; Fri, 25 Oct 2013 13:11:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 72680201ED for ; Fri, 25 Oct 2013 13:11:46 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2B9BB201E7 for ; Fri, 25 Oct 2013 13:11:45 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VZhAO-0001UV-58; Fri, 25 Oct 2013 13:11:04 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VZhAD-00049A-2f; Fri, 25 Oct 2013 13:10:53 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VZh9n-00045A-8t for linux-arm-kernel@lists.infradead.org; Fri, 25 Oct 2013 13:10:31 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id B0FF37FB; Fri, 25 Oct 2013 15:10:06 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (ip-77-221-165-98.dsl.twang.net [77.221.165.98]) by mail.free-electrons.com (Postfix) with ESMTPSA id 6371F6E2; Fri, 25 Oct 2013 15:10:06 +0200 (CEST) From: Maxime Ripard To: daniel.lezcano@linaro.org, tglx@linutronix.de Subject: [PATCH v2 5/5] ARM: sun7i: a20: Add support for the High Speed Timers Date: Fri, 25 Oct 2013 14:07:43 +0100 Message-Id: <1382706463-3892-6-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1382706463-3892-1-git-send-email-maxime.ripard@free-electrons.com> References: <1382706463-3892-1-git-send-email-maxime.ripard@free-electrons.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131025_091027_545013_BF47E5D1 X-CRM114-Status: GOOD ( 10.51 ) X-Spam-Score: -1.6 (-) Cc: sboyd@codeaurora.org, linux-kernel@vger.kernel.org, zhuzhenhua@allwinnertech.com, Gregory Clement , kevin.z.m.zh@gmail.com, sunny@allwinnertech.com, shuge@allwinnertech.com, Maxime Ripard , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Allwinner A20 has support for four high speed timers. Apart for the number of timers (4 vs 2), it's basically the same logic than the high speed timers found in the sun5i chips. Now that we have a driver to support it, we can enable them in the device tree. Signed-off-by: Maxime Ripard Tested-by: Emilio López --- arch/arm/boot/dts/sun7i-a20.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index e46cfed..ee6cec7 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -395,6 +395,16 @@ status = "disabled"; }; + hstimer@01c60000 { + compatible = "allwinner,sun7i-a20-hstimer"; + reg = <0x01c60000 0x1000>; + interrupts = <0 81 1>, + <0 82 1>, + <0 83 1>, + <0 84 1>; + clocks = <&ahb_gates 28>; + }; + gic: interrupt-controller@01c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>,