| Message ID | 1382707365-4776-4-git-send-email-maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c index f184f6c..2e79736 100644 --- a/arch/arm/mach-sunxi/sunxi.c +++ b/arch/arm/mach-sunxi/sunxi.c @@ -142,9 +142,17 @@ static const char * const sun6i_board_dt_compat[] = { NULL, }; +extern void __init sun6i_reset_init(void); +static void __init sun6i_timer_init(void) +{ + sunxi_init_clocks(); + sun6i_reset_init(); + clocksource_of_init(); +} + DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family") .init_machine = sunxi_dt_init, - .init_time = sunxi_timer_init, + .init_time = sun6i_timer_init, .dt_compat = sun6i_board_dt_compat, .restart = sun6i_restart, MACHINE_END
The A31 has a reset IP that maintains a few other IPs in reset by default. Among these IPs are the UARTs, and most notably the timers. We thus need to register the reset driver before initializing the timers so that the reset timer can use the reset framework. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- arch/arm/mach-sunxi/sunxi.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)