From patchwork Mon Oct 28 16:49:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 3103371 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B33389F2B7 for ; Mon, 28 Oct 2013 16:51:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6E8FD202EC for ; Mon, 28 Oct 2013 16:51:21 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 711BF202EB for ; Mon, 28 Oct 2013 16:51:19 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vaq1U-0003jE-C4; Mon, 28 Oct 2013 16:50:36 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vaq1G-0002kV-QM; Mon, 28 Oct 2013 16:50:22 +0000 Received: from mail-oa0-f43.google.com ([209.85.219.43]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vaq0s-0002fL-I3 for linux-arm-kernel@lists.infradead.org; Mon, 28 Oct 2013 16:50:00 +0000 Received: by mail-oa0-f43.google.com with SMTP id m1so3900962oag.30 for ; Mon, 28 Oct 2013 09:49:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XkurZ1ASu3wJa92h6OmddMB0z6+efW6J6AdQiMx9CIE=; b=acXiqqverxc1Uh3eOTaHYGkim7Z36TpYnGzdE0flJXNxJTxh4eE0ckfXYukpnnDL99 xzmA+LYJvlqvdfxHY9fK76KcSHwmtQ5Ujxr2VY8Kzz1CBuKGk5uDmnnfA2oVjpKCuBX1 1boE7OPuI+0nqoUloZzyqLsPfL8zy2L+8X3Nxl34nQ1iOQGCvh3CUWQBzdc+snd6MneM IjsSbnNYlVHEx3T29V/cX5o0R0UhzMJA08TM3bTS0THTHfEIQf5/utEAHlRQPTjFcc3S JGo+ffPeWP7qBkjXcBftB8ladz5uvWBAL8QJevlMgW1cmQs2ZT/tUP32YstO44dw58nt ozMg== X-Gm-Message-State: ALoCoQm9h/bdtjL5CqhMQuJE4YqMmOxCH3cIMLmcQNEYj5GfzPIy8aOnZtOJCFK695COWblylw2y X-Received: by 10.60.132.142 with SMTP id ou14mr2282292oeb.58.1382978976444; Mon, 28 Oct 2013 09:49:36 -0700 (PDT) Received: from localhost.localdomain (sccc-66-78-236-243.smartcity.com. [66.78.236.243]) by mx.google.com with ESMTPSA id nw5sm27719940obc.9.2013.10.28.09.49.35 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 28 Oct 2013 09:49:36 -0700 (PDT) From: Daniel Lezcano To: kernel@pengutronix.de Subject: [RFC PATCH 2/3] ARM: imx: cpuidle: Convert imx6q driver to platform_driver Date: Mon, 28 Oct 2013 09:49:32 -0700 Message-Id: <1382978973-4034-2-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1382978973-4034-1-git-send-email-daniel.lezcano@linaro.org> References: <1382978973-4034-1-git-send-email-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131028_124958_866503_34DBB23F X-CRM114-Status: GOOD ( 23.50 ) X-Spam-Score: -2.6 (--) Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The pm code and the cpuidle driver are tied together. The platform driver approach allows to split this code and move the pm low level code from the driver to the pm block. Signed-off-by: Daniel Lezcano --- arch/arm/mach-imx/cpuidle-imx6q.c | 31 ++++++++++++++++++------------- arch/arm/mach-imx/cpuidle.h | 20 -------------------- arch/arm/mach-imx/mach-imx6q.c | 8 -------- arch/arm/mach-imx/pm-imx6q.c | 30 ++++++++++++++++++++++++++++++ 4 files changed, 48 insertions(+), 41 deletions(-) delete mode 100644 arch/arm/mach-imx/cpuidle.h diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c index 23ddfb6..9761278 100644 --- a/arch/arm/mach-imx/cpuidle-imx6q.c +++ b/arch/arm/mach-imx/cpuidle-imx6q.c @@ -7,16 +7,15 @@ */ #include -#include +#include #include #include -#include "common.h" -#include "cpuidle.h" - static atomic_t master = ATOMIC_INIT(0); static DEFINE_SPINLOCK(master_lock); +static void (*imx6q_idle)(void); + static int imx6q_enter_wait(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { @@ -27,9 +26,9 @@ static int imx6q_enter_wait(struct cpuidle_device *dev, */ if (!spin_trylock(&master_lock)) goto idle; - imx6q_set_lpm(WAIT_UNCLOCKED); - cpu_do_idle(); - imx6q_set_lpm(WAIT_CLOCKED); + + imx6q_idle(); + spin_unlock(&master_lock); goto done; } @@ -63,13 +62,19 @@ static struct cpuidle_driver imx6q_cpuidle_driver = { .safe_state_index = 0, }; -int __init imx6q_cpuidle_init(void) +static int imx6q_cpuidle_probe(struct platform_device *dev) { - /* Need to enable SCU standby for entering WAIT modes */ - imx_scu_standby_enable(); - - /* Set chicken bit to get a reliable WAIT mode support */ - imx6q_set_chicken_bit(); + imx6q_idle = dev->dev.platform_data; return cpuidle_register(&imx6q_cpuidle_driver, NULL); } + +static struct platform_driver imx6q_driver_cpuidle = { + .driver = { + .name = "cpuidle-imx6q", + .owner = THIS_MODULE, + }, + .probe = imx6q_cpuidle_probe, +}; + +module_platform_driver(imx6q_driver_cpuidle); diff --git a/arch/arm/mach-imx/cpuidle.h b/arch/arm/mach-imx/cpuidle.h deleted file mode 100644 index 9e93ea0..0000000 --- a/arch/arm/mach-imx/cpuidle.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright 2012 Freescale Semiconductor, Inc. - * Copyright 2012 Linaro Ltd. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#ifdef CONFIG_CPU_IDLE -extern int imx6q_cpuidle_init(void); -#else -static inline int imx6q_cpuidle_init(void) -{ - return 0; -} -#endif diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 90372a2..9ca5b40 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -37,7 +37,6 @@ #include #include "common.h" -#include "cpuidle.h" #include "hardware.h" static u32 chip_revision; @@ -265,13 +264,6 @@ static struct platform_device imx6q_cpufreq_pdev = { static void __init imx6q_init_late(void) { - /* - * WAIT mode is broken on TO 1.0 and 1.1, so there is no point - * to run cpuidle on them. - */ - if (imx6q_revision() > IMX_CHIP_REVISION_1_1) - imx6q_cpuidle_init(); - if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) { imx6q_opp_init(); platform_device_register(&imx6q_cpufreq_pdev); diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c index 2049427..bbb6d1c 100644 --- a/arch/arm/mach-imx/pm-imx6q.c +++ b/arch/arm/mach-imx/pm-imx6q.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -50,12 +51,41 @@ static int imx6q_pm_enter(suspend_state_t state) return 0; } +static void imx6q_pm_idle(void) +{ + imx6q_set_lpm(WAIT_UNCLOCKED); + cpu_do_idle(); + imx6q_set_lpm(WAIT_CLOCKED); +} + static const struct platform_suspend_ops imx6q_pm_ops = { .enter = imx6q_pm_enter, .valid = suspend_valid_only_mem, }; +static struct platform_device imx6q_cpuidle_device = { + .name = "cpuidle-imx6q", + .dev = { + .platform_data = imx6q_pm_idle, + }, +}; + void __init imx6q_pm_init(void) { + /* + * WAIT mode is broken on TO 1.0 and 1.1, so there is no point + * to run cpuidle on them. + */ + if (imx6q_revision() > IMX_CHIP_REVISION_1_1) { + + /* Need to enable SCU standby for entering WAIT modes */ + imx_scu_standby_enable(); + + /* Set chicken bit to get a reliable WAIT mode support */ + imx6q_set_chicken_bit(); + + platform_device_register(&imx6q_cpuidle_device); + } + suspend_set_ops(&imx6q_pm_ops); }