From patchwork Mon Nov 11 10:55:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 3167041 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 63A3C9F3A0 for ; Mon, 11 Nov 2013 10:56:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DF0D120303 for ; Mon, 11 Nov 2013 10:56:16 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D7124202EA for ; Mon, 11 Nov 2013 10:56:11 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VfpA6-0001aQ-Ga; Mon, 11 Nov 2013 10:56:06 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VfpA4-0003dY-7v; Mon, 11 Nov 2013 10:56:04 +0000 Received: from mail-wg0-f42.google.com ([74.125.82.42]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VfpA0-0003ck-S4 for linux-arm-kernel@lists.infradead.org; Mon, 11 Nov 2013 10:56:02 +0000 Received: by mail-wg0-f42.google.com with SMTP id k14so2022845wgh.3 for ; Mon, 11 Nov 2013 02:55:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=IB5B49wyoOEdfXbBMSaTF6VbtrMwHvr6Q6Zmdz/WPlo=; b=P71JJDciygtI5XH3q4VPDxK4L9vkEEZcjpu7cHX61YRbQXDLMvFvA2X4FB5cKPX7vb 6j06of2U5cw/hilzeKou1+t11XTYFzrPEq3xXB6m7qAmylDKm6ns5RFcheWCuxAZurED VqIcfspDwTuxetnjBGTPv6cxUhg8n5eB0cTDv/UoEuXlVk3gPEPbZ/JruxKc8y2R4ys6 yo6YvpXAm/1dRq+wsohC9KmEHNZPcA6Xqwoc1WyQ0KKWXmSKZTInyDuWf6aJK9b8Y64/ K+B1rKm+gl+x9VZm0VOMiI9EweGCJwue+ka0gTxt0EX0eVJolfI/bInHCdLp3ydiST/9 IZkA== X-Gm-Message-State: ALoCoQm7hRIpmcgapuqFjOogVZMjGhIBmSKasKzAB09uOCzckssgr/ByPm1Wcgkwka1QwyroAnKV X-Received: by 10.180.187.175 with SMTP id ft15mr11930529wic.20.1384167333610; Mon, 11 Nov 2013 02:55:33 -0800 (PST) Received: from localhost.localdomain (cag06-7-83-153-85-71.fbx.proxad.net. [83.153.85.71]) by mx.google.com with ESMTPSA id ey4sm32966365wic.11.2013.11.11.02.55.32 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 11 Nov 2013 02:55:32 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3] arm64: defer reloading a task's FPSIMD state to userland resume Date: Mon, 11 Nov 2013 11:55:20 +0100 Message-Id: <1384167320-24062-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131111_055601_165918_C533466E X-CRM114-Status: GOOD ( 26.53 ) X-Spam-Score: -2.6 (--) Cc: catalin.marinas@arm.com, will.deacon@arm.com, Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP If a task gets scheduled out and back in again and nothing has touched its FPSIMD state in the mean time, there is really no reason to reload it from memory. Similarly, repeated calls to kernel_neon_begin() and kernel_neon_end() will preserve and restore the FPSIMD state every time. This patch defers the FPSIMD state restore to the last possible moment, i.e., right before the task re-enters userland. If a task does not enter userland at all (for any reason), the existing FPSIMD state is preserved and may be reused by the owning task if it gets scheduled in again on the same CPU. Signed-off-by: Ard Biesheuvel --- I realise that, semantically, using a thread flag (TIF_FOREIGN_FPSTATE) to represent something that is essentially per-cpu data is debatable, but this applies equally to TIF_NEED_RESCHED, and adding the flag to TIF_WORK_MASK allows it to be tested upon userland resume at zero marginal cost. Changes since v2: - always clear owner of current FPSIMD state in kernel_neon_begin() [rather than only if we need to save the state at that point] arch/arm64/include/asm/fpsimd.h | 3 ++ arch/arm64/include/asm/thread_info.h | 4 +- arch/arm64/kernel/entry.S | 2 +- arch/arm64/kernel/fpsimd.c | 79 +++++++++++++++++++++++++++++++----- arch/arm64/kernel/process.c | 3 +- arch/arm64/kernel/signal.c | 3 ++ 6 files changed, 81 insertions(+), 13 deletions(-) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index c43b4ac..609bc44 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -37,6 +37,8 @@ struct fpsimd_state { u32 fpcr; }; }; + /* the id of the last cpu to have restored this state */ + unsigned int last_cpu; }; #if defined(__KERNEL__) && defined(CONFIG_COMPAT) @@ -57,6 +59,7 @@ extern void fpsimd_load_state(struct fpsimd_state *state); extern void fpsimd_thread_switch(struct task_struct *next); extern void fpsimd_flush_thread(void); +extern void fpsimd_reload_fpstate(void); #endif diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index 23a3c47..7c4fd57 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -106,6 +106,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_SIGPENDING 0 #define TIF_NEED_RESCHED 1 #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ +#define TIF_FOREIGN_FPSTATE 3 /* CPU's FP state is not current's */ #define TIF_SYSCALL_TRACE 8 #define TIF_POLLING_NRFLAG 16 #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ @@ -118,10 +119,11 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) +#define _TIF_FOREIGN_FPSTATE (1 << TIF_FOREIGN_FPSTATE) #define _TIF_32BIT (1 << TIF_32BIT) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ - _TIF_NOTIFY_RESUME) + _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE) #endif /* __KERNEL__ */ #endif /* __ASM_THREAD_INFO_H */ diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 3881fd1..7267496 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -589,7 +589,7 @@ fast_work_pending: str x0, [sp, #S_X0] // returned x0 work_pending: tbnz x1, #TIF_NEED_RESCHED, work_resched - /* TIF_SIGPENDING or TIF_NOTIFY_RESUME case */ + /* TIF_SIGPENDING, TIF_NOTIFY_RESUME or TIF_FOREIGN_FPSTATE case */ ldr x2, [sp, #S_PSTATE] mov x0, sp // 'regs' tst x2, #PSR_MODE_MASK // user mode regs? diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index bb785d2..5b13c17 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -34,6 +34,23 @@ #define FPEXC_IDF (1 << 7) /* + * In order to reduce the number of times the fpsimd state is frivolously saved + * and restored, keep track here of which task's userland owns the current state + * of the FPSIMD register file. + * + * This percpu variable points to the fpsimd_state.last_cpu field of the task + * whose FPSIMD state was most recently loaded onto this cpu. The last_cpu field + * itself contains the id of the cpu onto which the task's FPSIMD state was + * loaded most recently. So, to decide whether we can skip reloading the FPSIMD + * state, we need to check + * (a) whether this task was the last one to have its FPSIMD state loaded onto + * this cpu + * (b) whether this task may have manipulated its FPSIMD state on another cpu in + * the meantime + */ +static DEFINE_PER_CPU(unsigned int *, fpsimd_last_cpu); + +/* * Trapped FP/ASIMD access. */ void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs) @@ -71,18 +88,56 @@ void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs) void fpsimd_thread_switch(struct task_struct *next) { - /* check if not kernel threads */ - if (current->mm) + /* + * The thread flag TIF_FOREIGN_FPSTATE conveys that the userland FPSIMD + * state belonging to the current task is not present in the registers + * but has (already) been saved to memory in order for the kernel to be + * able to go off and use the registers for something else. Therefore, + * we must not (re)save the register contents if this flag is set. + */ + if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE)) fpsimd_save_state(¤t->thread.fpsimd_state); - if (next->mm) - fpsimd_load_state(&next->thread.fpsimd_state); + + if (next->mm) { + /* + * If we are switching to a task whose most recent userland NEON + * contents are already in the registers of *this* cpu, we can + * skip loading the state from memory. Otherwise, set the + * TIF_FOREIGN_FPSTATE flag so the state will be loaded upon the + * next entry of userland. + */ + struct fpsimd_state *st = &next->thread.fpsimd_state; + + if (__get_cpu_var(fpsimd_last_cpu) == &st->last_cpu + && st->last_cpu == smp_processor_id()) + clear_ti_thread_flag(task_thread_info(next), + TIF_FOREIGN_FPSTATE); + else + set_ti_thread_flag(task_thread_info(next), + TIF_FOREIGN_FPSTATE); + } } void fpsimd_flush_thread(void) { - preempt_disable(); memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state)); - fpsimd_load_state(¤t->thread.fpsimd_state); + set_thread_flag(TIF_FOREIGN_FPSTATE); +} + +void fpsimd_reload_fpstate(void) +{ + preempt_disable(); + if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { + /* + * We are entering userland and the userland context is not yet + * present in the registers. + */ + struct fpsimd_state *st = ¤t->thread.fpsimd_state; + + fpsimd_load_state(st); + __get_cpu_var(fpsimd_last_cpu) = &st->last_cpu; + st->last_cpu = smp_processor_id(); + } preempt_enable(); } @@ -97,16 +152,20 @@ void kernel_neon_begin(void) BUG_ON(in_interrupt()); preempt_disable(); - if (current->mm) + /* + * Save the userland FPSIMD state if we have one and if we haven't done + * so already. Clear fpsimd_last_cpu to indicate that there is no + * longer userland context in the registers. + */ + if (current->mm && !test_and_set_thread_flag(TIF_FOREIGN_FPSTATE)) fpsimd_save_state(¤t->thread.fpsimd_state); + __get_cpu_var(fpsimd_last_cpu) = NULL; + } EXPORT_SYMBOL(kernel_neon_begin); void kernel_neon_end(void) { - if (current->mm) - fpsimd_load_state(¤t->thread.fpsimd_state); - preempt_enable(); } EXPORT_SYMBOL(kernel_neon_end); diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 7ae8a1f..ef88831 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -195,7 +195,8 @@ void release_thread(struct task_struct *dead_task) int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) { - fpsimd_save_state(¤t->thread.fpsimd_state); + if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) + fpsimd_save_state(¤t->thread.fpsimd_state); *dst = *src; return 0; } diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 890a591..0a9eccf 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -416,4 +416,7 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, clear_thread_flag(TIF_NOTIFY_RESUME); tracehook_notify_resume(regs); } + + if (thread_flags & _TIF_FOREIGN_FPSTATE) + fpsimd_reload_fpstate(); }