From patchwork Tue Nov 12 13:48:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 3173421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AE5CE9F3A0 for ; Tue, 12 Nov 2013 15:00:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5CEDA204FF for ; Tue, 12 Nov 2013 15:00:31 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91ACB2018C for ; Tue, 12 Nov 2013 15:00:26 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VgEMG-0005wz-Bp; Tue, 12 Nov 2013 13:50:21 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VgELa-0005tz-8v; Tue, 12 Nov 2013 13:49:38 +0000 Received: from mail-wg0-f47.google.com ([74.125.82.47]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VgELB-0005pG-J2 for linux-arm-kernel@lists.infradead.org; Tue, 12 Nov 2013 13:49:17 +0000 Received: by mail-wg0-f47.google.com with SMTP id y10so2400447wgg.2 for ; Tue, 12 Nov 2013 05:48:49 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=O3ZCU2HryvhpD+7Huo/WMh1ggNDbTDl9lECSwErMmMs=; b=FAg21Orgj6B/3WCAsjD1HQzBy6w9XuJrojArjtSRnxqxfbK7m2DGnReDrZE8yCoduw WkUgyIE4NAA/r3RTPNaHC0hXW9IlUgrKa0bKR5Z3E33VrVFbMPdG9LzGthyDTYxCF13w cjcS9TdkTTJZVdWKTkHvWs75ckrQ0CJySXK14x7EjRU1EOWgSUAr/xwK+WN8J6o78R5D /G0WltsDS95ig0izxS1vIZj6JrSwzwOKEQ7Ln12zXfXFRnu5RYaeiYqKpJYWgv7yNuI6 MO3Z7fktjwiqXeJhvOlw5Ra2aTCIr85ehYjDhA7pI6fMODfTHf0aS3RfXyLTf1JvrKjB YNpw== X-Gm-Message-State: ALoCoQnaWItDXdwgmFbj8T69zeI6pvujmWLMf5HYnNWelWZ65uTAhYaCra3dYwh1OGzolBtOk3fO X-Received: by 10.180.97.5 with SMTP id dw5mr16284803wib.42.1384264129241; Tue, 12 Nov 2013 05:48:49 -0800 (PST) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id y20sm8168165wib.0.2013.11.12.05.48.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Nov 2013 05:48:48 -0800 (PST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Russell King Subject: [PATCH 7/7] ARM: sa1100: move state to the overall container Date: Tue, 12 Nov 2013 14:48:45 +0100 Message-Id: <1384264125-6431-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.8.3.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131112_084913_808034_3B9CF0F4 X-CRM114-Status: GOOD ( 13.80 ) X-Spam-Score: -2.6 (--) Cc: Dmitry Eremin-Solenikov , Dmitry Eremin-Solenikov , Dmitry Artamonow , Andrea Adami , Linus Walleij X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Instead of saving the state of registers in a special struct across suspend/resume, use some fields in the generic system controller state container struct. Signed-off-by: Linus Walleij --- arch/arm/mach-sa1100/irq.c | 35 ++++++++++++++++------------------- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index a6823f3281e2..ce847939ac65 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -40,6 +40,10 @@ * @gpio_falling: whether the IRQ for the GPIO corresponding to the * bit in this word should trigger on falling edges. * @gpio_mask: whether this GPIO is masked off. + * @saved: indicates whether we have a saved state. + * @icmr: saved state for the ICMR register. + * @iclr: saved state for the ICLR register. + * @iccr: saved state for the ICCR register. */ struct sa1100_sc { struct irq_domain *domain; @@ -50,6 +54,10 @@ struct sa1100_sc { u32 gpio_rising; u32 gpio_falling; u32 gpio_mask; + bool saved; + u32 icmr; + u32 iclr; + u32 iccr; }; static int sa1100_gpio_type(struct irq_data *d, unsigned int type) @@ -286,22 +294,14 @@ static struct irq_domain_ops sa1100_sc_high_irqdomain_ops = { static struct resource irq_resource = DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs"); -static struct sa1100irq_state { - unsigned int saved; - unsigned int icmr; - unsigned int iclr; - unsigned int iccr; -} sa1100irq_state; - static int sa1100irq_suspend(void) { struct sa1100_sc *sc = &sa1100_sc; - struct sa1100irq_state *st = &sa1100irq_state; - st->saved = 1; - st->icmr = ICMR; - st->iclr = ICLR; - st->iccr = ICCR; + sc->saved = true; + sc->icmr = ICMR; + sc->iclr = ICLR; + sc->iccr = ICCR; /* * Disable all GPIO-based interrupts. @@ -327,16 +327,13 @@ static int sa1100irq_suspend(void) static void sa1100irq_resume(void) { struct sa1100_sc *sc = &sa1100_sc; - struct sa1100irq_state *st = &sa1100irq_state; - - if (st->saved) { - ICCR = st->iccr; - ICLR = st->iclr; + if (sc->saved) { + ICCR = sc->iccr; + ICLR = sc->iclr; GRER = sc->gpio_rising & sc->gpio_mask; GFER = sc->gpio_falling & sc->gpio_mask; - - ICMR = st->icmr; + ICMR = sc->icmr; } }