From patchwork Thu Nov 21 15:30:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Khoronzhuk X-Patchwork-Id: 3219341 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B6EEA9F3A0 for ; Thu, 21 Nov 2013 15:31:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A0C8F204E4 for ; Thu, 21 Nov 2013 15:31:39 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D301020318 for ; Thu, 21 Nov 2013 15:31:37 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjWE9-0002uu-CY; Thu, 21 Nov 2013 15:31:33 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjWE7-0006A0-2X; Thu, 21 Nov 2013 15:31:31 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjWE3-00069h-SX for linux-arm-kernel@lists.infradead.org; Thu, 21 Nov 2013 15:31:28 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id rALFV20o025575; Thu, 21 Nov 2013 09:31:02 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id rALFV2MV001207; Thu, 21 Nov 2013 09:31:02 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Thu, 21 Nov 2013 09:31:02 -0600 Received: from uglx0177649.ucm2.emeaucm.ext.ti.com (uglx0177649.ucm2.emeaucm.ext.ti.com [10.167.145.122]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id rALFUxLA007287; Thu, 21 Nov 2013 09:31:00 -0600 From: Ivan Khoronzhuk To: Santosh Shilimkar Subject: [PATCH] clk: keystone: gate: don't use reserved bits Date: Thu, 21 Nov 2013 17:30:51 +0200 Message-ID: <1385047851-14407-1-git-send-email-ivan.khoronzhuk@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131121_103127_999432_8EA8B11D X-CRM114-Status: UNSURE ( 8.79 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.4 (-------) Cc: Ivan Khoronzhuk , grygorii.strashko@ti.com, Mike Turquette , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to TRM http://www.ti.com/lit/ug/sprugv4b/sprugv4b.pdf the Power Domain Status Register (PDSTAT) has 0-1 bits for power domain status, but PDSTAT_STATE_MASK is defined with 0x1F. In that case we operate with reserved bits. So correct PDSTAT_STATE_MASK to be 0x03. Signed-off-by: Ivan Khoronzhuk --- drivers/clk/keystone/gate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/keystone/gate.c b/drivers/clk/keystone/gate.c index 1f333bc..995ae80 100644 --- a/drivers/clk/keystone/gate.c +++ b/drivers/clk/keystone/gate.c @@ -35,7 +35,7 @@ #define MDSTAT_STATE_MASK 0x3f #define MDSTAT_MCKOUT BIT(12) -#define PDSTAT_STATE_MASK 0x1f +#define PDSTAT_STATE_MASK 0x03 #define MDCTL_FORCE BIT(31) #define MDCTL_LRESET BIT(8) #define PDCTL_NEXT BIT(0)