From patchwork Mon Nov 25 21:15:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Kleine-Budde X-Patchwork-Id: 3234411 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B9A429F3A0 for ; Mon, 25 Nov 2013 21:16:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BCB0F2012F for ; Mon, 25 Nov 2013 21:16:34 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C286C2010A for ; Mon, 25 Nov 2013 21:16:33 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vl3Vn-0001fV-Jr; Mon, 25 Nov 2013 21:16:07 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vl3Vh-0006kx-Oi; Mon, 25 Nov 2013 21:16:01 +0000 Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vl3VY-0006jV-9Q for linux-arm-kernel@lists.infradead.org; Mon, 25 Nov 2013 21:15:53 +0000 Received: from dude.hi.pengutronix.de ([2001:6f8:1178:2:21e:67ff:fe11:9c5c]) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1Vl3V4-0003HH-Rd; Mon, 25 Nov 2013 22:15:22 +0100 Received: from mkl by dude.hi.pengutronix.de with local (Exim 4.80) (envelope-from ) id 1Vl3V3-00020G-Vf; Mon, 25 Nov 2013 22:15:21 +0100 From: Marc Kleine-Budde To: Shawn Guo Subject: [PATCH v2 2/2] ARM i.MX5: set CAN peripheral clock to 24 MHz parent Date: Mon, 25 Nov 2013 22:15:21 +0100 Message-Id: <1385414121-21493-3-git-send-email-mkl@pengutronix.de> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1385414121-21493-1-git-send-email-mkl@pengutronix.de> References: <1385414121-21493-1-git-send-email-mkl@pengutronix.de> X-SA-Exim-Connect-IP: 2001:6f8:1178:2:21e:67ff:fe11:9c5c X-SA-Exim-Mail-From: mkl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131125_161552_554083_EBB6764E X-CRM114-Status: GOOD ( 12.39 ) X-Spam-Score: -1.9 (-) Cc: lst@pengutronix.de, Marc Kleine-Budde , linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, linux-can@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch sets the parent of CAN peripheral clock (a.k.a. CPI clock) to the lp_apm clock, which has a rate of 24 MHz. In the CAN world a base clock with multiple of 8 MHz is suited best for all CIA recommented bit rates. Without this patch the CAN peripheral clock on i.MX53 has a rate of 66.666 MHz which produces quite large bit rate errors. Signed-off-by: Marc Kleine-Budde --- arch/arm/mach-imx/clk-imx51-imx53.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index e349fd5..dff5ca9 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -584,6 +584,9 @@ static void __init mx53_clocks_init(struct device_node *np) clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000); clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000); + /* move can bus clk to 24MHz */ + clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]); + clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]); imx_print_silicon_rev("i.MX53", mx53_revision()); clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);