From patchwork Sun Dec 1 06:26:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Yanovich X-Patchwork-Id: 3261681 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D9AB7BEEAD for ; Sun, 1 Dec 2013 07:03:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8587F203DF for ; Sun, 1 Dec 2013 07:03:15 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 17D742021F for ; Sun, 1 Dec 2013 07:03:14 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vn0Xd-000742-Gl; Sun, 01 Dec 2013 06:30:08 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vn0Ww-0002Uf-Ou; Sun, 01 Dec 2013 06:29:22 +0000 Received: from mail-la0-x230.google.com ([2a00:1450:4010:c03::230]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vn0Wo-0002Qk-1S for linux-arm-kernel@lists.infradead.org; Sun, 01 Dec 2013 06:29:18 +0000 Received: by mail-la0-f48.google.com with SMTP id n7so7672239lam.35 for ; Sat, 30 Nov 2013 22:28:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pWfarqzIvwbstHKkMXvVsO9JHzsg+8HyQux9v9Ok5UY=; b=E7JvAJsMS6rdv1Dna7JinGJwq/zGSwNOpjKKxzaBLUPPA+zCs8S8P7/HGx4og5A1bN sXCnjf+QXoeOJmdtIrmtb1xtXN/piUT5HuUPgHZ1A9kZfA38jFdGpmgNTtNg/iZer3Pr TSz2Ixtw/yq8ix4iWv9JNQdkLpGNYZLM2dFDJA9gGVm+e9QK8tcmdXUWicAjkF0oadAx nWYG8laQGkibHvAqVvN71WgThgkBQZrVPVlpaTeYO1HiuQW42IOcMIeVeJikfVihv5t7 LaetxW9S6SgU0Ilf/4PcET/PuYEbsNZdAVv1X2eoTTmZ2tAxufGY0U0WPeoceYVtjR3B FhTw== X-Received: by 10.152.244.130 with SMTP id xg2mr41439288lac.4.1385879332370; Sat, 30 Nov 2013 22:28:52 -0800 (PST) Received: from host5.omatika.ru (0893675324.static.corbina.ru. [95.31.1.192]) by mx.google.com with ESMTPSA id e10sm82577921laa.6.2013.11.30.22.28.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 30 Nov 2013 22:28:51 -0800 (PST) From: Sergei Ianovich To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 08/11] misc: support for parallel slots in LP-8x4x Date: Sun, 1 Dec 2013 10:26:21 +0400 Message-Id: <1385879185-22455-9-git-send-email-ynvich@gmail.com> X-Mailer: git-send-email 1.8.4.3 In-Reply-To: <1385879185-22455-1-git-send-email-ynvich@gmail.com> References: <1385879185-22455-1-git-send-email-ynvich@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131201_012914_512098_76D8EDCC X-CRM114-Status: GOOD ( 20.90 ) X-Spam-Score: -1.9 (-) Cc: Russell King , Arnd Bergmann , "open list:DOCUMENTATION" , Greg Kroah-Hartman , Haojian Zhuang , Sergei Ianovich , Rob Landley , Eric Miao X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RCVD_IN_SBL, RP_MATCHES_RCVD, T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch enumerates parallel modules in expansion slots and exposes model numbers via sysfs. Signed-off-by: Sergei Ianovich --- Documentation/misc-devices/lp8x4x_bus.txt | 8 ++ arch/arm/mach-pxa/include/mach/lp8x4x.h | 8 ++ arch/arm/mach-pxa/lp8x4x.c | 42 +++++++++- drivers/misc/lp8x4x_bus.c | 127 ++++++++++++++++++++++++++++++ 4 files changed, 184 insertions(+), 1 deletion(-) diff --git a/Documentation/misc-devices/lp8x4x_bus.txt b/Documentation/misc-devices/lp8x4x_bus.txt index d9a069d..9285fdc 100644 --- a/Documentation/misc-devices/lp8x4x_bus.txt +++ b/Documentation/misc-devices/lp8x4x_bus.txt @@ -28,6 +28,9 @@ into the device, they could be accessed using the 2nd PXA built-in UART port (/dev/ttySA1). However, it seems that addresses are not processed by the modules. So the parallel bus needs to select which slot is connected. +Parallel modules allow much faster communication. There are accessed using +IO memory through the FPGA. Their ports are exposed via sysfs. + SYSFS ----- @@ -41,3 +44,8 @@ active_slot is a parallel module in the selected slot, it simply ignores incoming packets. So it is safe to activate any available slot. + +/sys/bus/icpdas/devices/slot%02i: + +model + RO - shows expansion module model number diff --git a/arch/arm/mach-pxa/include/mach/lp8x4x.h b/arch/arm/mach-pxa/include/mach/lp8x4x.h index 9addfa8..e1005c5 100644 --- a/arch/arm/mach-pxa/include/mach/lp8x4x.h +++ b/arch/arm/mach-pxa/include/mach/lp8x4x.h @@ -37,6 +37,14 @@ /* board level registers in the FPGA */ +#define LP8X4X_SLOT1_IO 0x17001000 +#define LP8X4X_SLOT2_IO 0x17002000 +#define LP8X4X_SLOT3_IO 0x17003000 +#define LP8X4X_SLOT4_IO 0x17004000 +#define LP8X4X_SLOT5_IO 0x17005000 +#define LP8X4X_SLOT6_IO 0x17006000 +#define LP8X4X_SLOT7_IO 0x17007000 +#define LP8X4X_SLOT8_IO 0x17008000 #define LP8X4X_SLOT_SWITCH 0x17009004 #define LP8X4X_EOI LP8X4X_P2V(0x17009006) #define LP8X4X_INSINT LP8X4X_P2V(0x17009008) diff --git a/arch/arm/mach-pxa/lp8x4x.c b/arch/arm/mach-pxa/lp8x4x.c index b30343d..ae84d36 100644 --- a/arch/arm/mach-pxa/lp8x4x.c +++ b/arch/arm/mach-pxa/lp8x4x.c @@ -429,6 +429,46 @@ static struct resource lp8x4x_bus_resources[] = { .end = LP8X4X_SLOT_SWITCH, .flags = IORESOURCE_MEM, }, + [2] = { + .start = LP8X4X_SLOT1_IO, + .end = LP8X4X_SLOT1_IO + 15, + .flags = IORESOURCE_MEM, + }, + [3] = { + .start = LP8X4X_SLOT2_IO, + .end = LP8X4X_SLOT2_IO + 15, + .flags = IORESOURCE_MEM, + }, + [4] = { + .start = LP8X4X_SLOT3_IO, + .end = LP8X4X_SLOT3_IO + 15, + .flags = IORESOURCE_MEM, + }, + [5] = { + .start = LP8X4X_SLOT4_IO, + .end = LP8X4X_SLOT4_IO + 15, + .flags = IORESOURCE_MEM, + }, + [6] = { + .start = LP8X4X_SLOT5_IO, + .end = LP8X4X_SLOT5_IO + 15, + .flags = IORESOURCE_MEM, + }, + [7] = { + .start = LP8X4X_SLOT6_IO, + .end = LP8X4X_SLOT6_IO + 15, + .flags = IORESOURCE_MEM, + }, + [8] = { + .start = LP8X4X_SLOT7_IO, + .end = LP8X4X_SLOT7_IO + 15, + .flags = IORESOURCE_MEM, + }, + [9] = { + .start = LP8X4X_SLOT8_IO, + .end = LP8X4X_SLOT8_IO + 15, + .flags = IORESOURCE_MEM, + }, }; static struct platform_device lp8x4x_bus_device[] = { @@ -436,7 +476,7 @@ static struct platform_device lp8x4x_bus_device[] = { .name = "lp8x4x-bus", .id = 0, .resource = &lp8x4x_bus_resources[0], - .num_resources = 2, + .num_resources = 10, }, }; diff --git a/drivers/misc/lp8x4x_bus.c b/drivers/misc/lp8x4x_bus.c index 647fde7..b2d4a04 100644 --- a/drivers/misc/lp8x4x_bus.c +++ b/drivers/misc/lp8x4x_bus.c @@ -24,14 +24,57 @@ MODULE_LICENSE("GPL"); MODULE_AUTHOR("Sergei Ianovich "); MODULE_DESCRIPTION("ICP DAS LP-8x4x parallel bus driver"); +struct lp8x4x_slot { + void *data_addr; + unsigned int model; + struct device dev; +}; + +#define LP8X4X_MAX_SLOT_COUNT 8 struct lp8x4x_master { unsigned int slot_count; void *count_addr; unsigned int active_slot; void *switch_addr; + struct lp8x4x_slot slot[LP8X4X_MAX_SLOT_COUNT]; struct device dev; }; +static unsigned char lp8x4x_model[256] = { + 0, 0, 0, 0x11, 0, 0x18, 0x13, 0x11, + 0x0e, 0x11, 0, 0, 0, 0x5a, 0x5b, 0x5c, + 0x3c, 0x44, 0x34, 0x3a, 0x39, 0x36, 0x37, 0x33, + 0x35, 0x40, 0x41, 0x42, 0x38, 0x3f, 0x32, 0x45, + 0xac, 0x70, 0x8e, 0x8e, 0x1e, 0x72, 0x90, 0x29, + 0x4a, 0x22, 0xd3, 0xd2, 0x28, 0x25, 0x2a, 0x29, + 0x48, 0x49, 0x5d, 0x1f, 0x20, 0x23, 0x24, 0x4d, + 0x3d, 0x3e, 0, 0, 0, 0, 0, 0, + 0, 0x78, 0x72, 0x2b, 0x5e, 0x5e, 0x36, 0xae, + 0x30, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0x5c, 0x5e, 0, 0x5e, 0, 0, + 0, 0x3b, 0, 0, 0, 0, 0, 0, + 0, 0x50, 0x2e, 0, 0x58, 0, 0, 0x43, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0x54, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0 +}; + static int lp8x4x_match(struct device *dev, struct device_driver *drv) { return 1; @@ -42,6 +85,26 @@ static struct bus_type lp8x4x_bus_type = { .match = lp8x4x_match, }; +static void lp8x4x_slot_release(struct device *dev) +{ +} + +static ssize_t model_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct lp8x4x_slot *s = container_of(dev, struct lp8x4x_slot, dev); + + return sprintf(buf, "%u\n", s->model + 8000); +} + +static DEVICE_ATTR_RO(model); + +static struct attribute *slot_dev_attrs[] = { + &dev_attr_model.attr, + NULL, +}; +ATTRIBUTE_GROUPS(slot_dev); + static void lp8x4x_master_release(struct device *dev) { struct lp8x4x_master *m = container_of(dev, struct lp8x4x_master, dev); @@ -107,10 +170,18 @@ ATTRIBUTE_GROUPS(master_dev); static void devm_lp8x4x_bus_release(struct device *dev, void *res) { struct lp8x4x_master *m = *(struct lp8x4x_master **)res; + struct lp8x4x_slot *s; void *mem = m->count_addr; void *mem2 = m->switch_addr; + int i; dev_info(dev, "releasing devices\n"); + for (i = 0; i < LP8X4X_MAX_SLOT_COUNT; i++) { + s = &m->slot[i]; + if (s->model) + device_unregister(&s->dev); + iounmap(s->data_addr); + } device_unregister(&m->dev); bus_unregister(&lp8x4x_bus_type); @@ -120,11 +191,36 @@ static void devm_lp8x4x_bus_release(struct device *dev, void *res) iounmap(mem); } +static void __init lp8x4x_bus_probe_slot(struct lp8x4x_master *m, int i, + unsigned char model) +{ + struct lp8x4x_slot *s = &m->slot[i]; + int err; + + dev_info(&m->dev, "found %u in slot %i\n", 8000 + model, i + 1); + + s->dev.bus = &lp8x4x_bus_type; + dev_set_name(&s->dev, "slot%02i", i + 1); + s->dev.parent = &m->dev; + s->dev.release = lp8x4x_slot_release; + s->dev.groups = slot_dev_groups; + s->model = model; + + err = device_register(&s->dev); + if (err < 0) { + dev_err(&s->dev, "failed to register device\n"); + s->model = 0; + return; + } +} + static int __init lp8x4x_bus_probe(struct platform_device *pdev) { struct lp8x4x_master *m, **p; struct resource *res; + int i; int err = 0; + unsigned int model; m = kzalloc(sizeof(*m), GFP_KERNEL); if (!m) @@ -167,6 +263,30 @@ static int __init lp8x4x_bus_probe(struct platform_device *pdev) goto err3; } + for (i = 0; i < LP8X4X_MAX_SLOT_COUNT; i++) { + res = platform_get_resource(pdev, IORESOURCE_MEM, i + 2); + if (!res) { + dev_err(&pdev->dev, "Failed to get slot %i address\n", + i); + err = -ENODEV; + goto err4; + } + + m->slot[i].data_addr = ioremap(res->start, resource_size(res)); + if (!m->slot[i].data_addr) { + dev_err(&pdev->dev, "Failed to ioremap %p\n", + m->slot[i].data_addr); + err = -EFAULT; + goto err4; + } + continue; +err4: + for (i--; i >= 0; i--) + iounmap(m->slot[i].data_addr); + + goto err3; + } + m->slot_count = ioread8(m->count_addr); switch (m->slot_count) { case 1: @@ -205,6 +325,13 @@ static int __init lp8x4x_bus_probe(struct platform_device *pdev) } devres_add(&pdev->dev, p); + for (i = 0; i < LP8X4X_MAX_SLOT_COUNT; i++) { + model = lp8x4x_model[ioread8(m->slot[i].data_addr)]; + if (!model) + continue; + + lp8x4x_bus_probe_slot(m, i, model); + } return 0; err_dev: