From patchwork Tue Dec 3 07:37:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Chen X-Patchwork-Id: 3274271 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2648AC0D4A for ; Tue, 3 Dec 2013 08:22:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E594A20270 for ; Tue, 3 Dec 2013 08:22:29 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 792C92026D for ; Tue, 3 Dec 2013 08:22:28 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnl3n-000202-GJ; Tue, 03 Dec 2013 08:10:24 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnl2D-0003GG-SO; Tue, 03 Dec 2013 08:08:45 +0000 Received: from va3ehsobe003.messaging.microsoft.com ([216.32.180.13] helo=va3outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnl1M-00037V-Ns for linux-arm-kernel@lists.infradead.org; Tue, 03 Dec 2013 08:07:54 +0000 Received: from mail102-va3-R.bigfish.com (10.7.14.240) by VA3EHSOBE001.bigfish.com (10.7.40.21) with Microsoft SMTP Server id 14.1.225.22; Tue, 3 Dec 2013 08:07:25 +0000 Received: from mail102-va3 (localhost [127.0.0.1]) by mail102-va3-R.bigfish.com (Postfix) with ESMTP id 240321200FF; Tue, 3 Dec 2013 08:07:25 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h2327h2336h1155h) Received: from mail102-va3 (localhost.localdomain [127.0.0.1]) by mail102-va3 (MessageSwitch) id 138605804342923_785; Tue, 3 Dec 2013 08:07:23 +0000 (UTC) Received: from VA3EHSMHS023.bigfish.com (unknown [10.7.14.225]) by mail102-va3.bigfish.com (Postfix) with ESMTP id ED6992A0137; Tue, 3 Dec 2013 08:07:22 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS023.bigfish.com (10.7.99.33) with Microsoft SMTP Server (TLS) id 14.16.227.3; Tue, 3 Dec 2013 08:07:21 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-005.039d.mgd.msft.net (10.84.1.17) with Microsoft SMTP Server (TLS) id 14.3.158.2; Tue, 3 Dec 2013 08:07:20 +0000 Received: from shlinux1.ap.freescale.net (shlinux1.ap.freescale.net [10.192.225.216]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id rB385uEr020172; Tue, 3 Dec 2013 01:07:16 -0700 From: Peter Chen To: , , , Subject: [PATCH v4 16/17] usb: phy-mxs: fix the problem by only using 1st controller's register Date: Tue, 3 Dec 2013 15:37:10 +0800 Message-ID: <1386056231-17258-17-git-send-email-peter.chen@freescale.com> X-Mailer: git-send-email 1.7.8 In-Reply-To: <1386056231-17258-1-git-send-email-peter.chen@freescale.com> References: <1386056231-17258-1-git-send-email-peter.chen@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131203_030752_884125_E3F6A588 X-CRM114-Status: GOOD ( 15.65 ) X-Spam-Score: -2.6 (--) Cc: marex@denx.de, devicetree@vger.kernel.org, m.grzeschik@pengutronix.de, frank.li@freescale.com, linux-doc@vger.kernel.org, alexander.shishkin@linux.intel.com, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, peter.chen@freescale.com, kernel@pengutronix.de, festevam@gmail.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We fix the problem that we only use the 1st controller's related registers at mxs_phy_disconnect_line, but in fact, it needs to access registers according to different PHYs. Signed-off-by: Peter Chen --- drivers/usb/phy/phy-mxs-usb.c | 89 +++++++++++++++++++++++++++++------------ 1 files changed, 63 insertions(+), 26 deletions(-) diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c index 4c2dfcd..542b6ec 100644 --- a/drivers/usb/phy/phy-mxs-usb.c +++ b/drivers/usb/phy/phy-mxs-usb.c @@ -62,17 +62,23 @@ #define ANADIG_ANA_MISC0_CLR 0x158 #define ANADIG_USB1_VBUS_DET_STAT 0x1c0 +#define ANADIG_USB2_VBUS_DET_STAT 0x220 #define ANADIG_USB1_LOOPBACK_SET 0x1e4 #define ANADIG_USB1_LOOPBACK_CLR 0x1e8 +#define ANADIG_USB2_LOOPBACK_SET 0x244 +#define ANADIG_USB2_LOOPBACK_CLR 0x248 #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG BIT(12) #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL BIT(11) #define BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID BIT(3) +#define BM_ANADIG_USB2_VBUS_DET_STAT_VBUS_VALID BIT(3) #define BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 BIT(2) #define BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN BIT(5) +#define BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1 BIT(2) +#define BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN BIT(5) #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy) @@ -182,12 +188,61 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy) return 0; } -static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on) +/* Return true if the vbus is there */ +static bool mxs_phy_get_vbus_status(struct mxs_phy *mxs_phy) +{ + unsigned int vbus_value; + + if (mxs_phy->port_id == 0) + regmap_read(mxs_phy->regmap_anatop, + ANADIG_USB1_VBUS_DET_STAT, + &vbus_value); + else if (mxs_phy->port_id == 1) + regmap_read(mxs_phy->regmap_anatop, + ANADIG_USB2_VBUS_DET_STAT, + &vbus_value); + + if (vbus_value & BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID) + return true; + else + return false; +} + +static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect) { void __iomem *base = mxs_phy->phy.io_priv; + u32 reg; + + if (disconnect) + writel_relaxed(BM_USBPHY_DEBUG_CLKGATE, + base + HW_USBPHY_DEBUG_CLR); + + if (mxs_phy->port_id == 0) { + reg = disconnect ? ANADIG_USB1_LOOPBACK_SET + : ANADIG_USB1_LOOPBACK_CLR; + regmap_write(mxs_phy->regmap_anatop, reg, + BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 | + BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN); + } else if (mxs_phy->port_id == 1) { + reg = disconnect ? ANADIG_USB2_LOOPBACK_SET + : ANADIG_USB2_LOOPBACK_CLR; + regmap_write(mxs_phy->regmap_anatop, reg, + BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1 | + BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN); + } + + if (!disconnect) + writel_relaxed(BM_USBPHY_DEBUG_CLKGATE, + base + HW_USBPHY_DEBUG_SET); + + /* Delay some time, and let Linestate be SE0 for controller */ + if (disconnect) + usleep_range(500, 1000); +} + +static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on) +{ bool vbus_is_on = false; - static bool line_is_disconnected; - unsigned int vbus_value = 0; /* If the SoCs don't need to disconnect line without vbus, quit */ if (!(mxs_phy->data->flags & MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS)) @@ -197,31 +252,13 @@ static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on) if (!mxs_phy->regmap_anatop) return; - regmap_read(mxs_phy->regmap_anatop, ANADIG_USB1_VBUS_DET_STAT, - &vbus_value); - if (vbus_value & BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID) - vbus_is_on = true; + vbus_is_on = mxs_phy_get_vbus_status(mxs_phy); - if (on && !vbus_is_on) { - writel_relaxed(BM_USBPHY_DEBUG_CLKGATE, - base + HW_USBPHY_DEBUG_CLR); - regmap_write(mxs_phy->regmap_anatop, ANADIG_USB1_LOOPBACK_SET, - BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 | - BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN); - /* Delay some time, and let Linestate be SE0 for controller */ - usleep_range(500, 1000); - line_is_disconnected = true; - } else if (line_is_disconnected) { - regmap_write(mxs_phy->regmap_anatop, ANADIG_USB1_LOOPBACK_CLR, - BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 | - BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN); - writel_relaxed(BM_USBPHY_DEBUG_CLKGATE, - base + HW_USBPHY_DEBUG_SET); - line_is_disconnected = false; - } + if (on && !vbus_is_on) + __mxs_phy_disconnect_line(mxs_phy, true); + else + __mxs_phy_disconnect_line(mxs_phy, false); - dev_dbg(mxs_phy->phy.dev, "line is %s\n", line_is_disconnected - ? "disconnected" : "connected"); } static void mxs_phy_enable_ldo_in_suspend(struct mxs_phy *mxs_phy, bool on)