| Message ID | 1386166641-7567-5-git-send-email-andrew@lunn.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Dec 04, 2013 at 02:17:21PM +0000, Andrew Lunn wrote: > The dove-cpufreq driver needs access to the DDR and CPU clock. There > is also an interrupt generated when the DFS hardware completes a > change of frequencey. Add these to the cpu node in DT. > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> > --- > arch/arm/boot/dts/dove.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi > index 4c8028513133..3842ba02dddf 100644 > --- a/arch/arm/boot/dts/dove.dtsi > +++ b/arch/arm/boot/dts/dove.dtsi > @@ -22,6 +22,10 @@ > device_type = "cpu"; > next-level-cache = <&l2>; > reg = <0>; > + clocks = <&core_clk 1>, <&core_clk 3>; > + clock-names = "cpu_clk", "ddrclk"; > + interrupt-parent = <&pmu_intc>; > + interrupts = <0>; Is this interrupt actually generated by the CPU, or by the power management unit? Is ddrclk actually fed into the CPU? Given that you seem to have an external L2 I don't see why the CPU would need the DDR clock. Thanks, Mark.
On Wed, Dec 04, 2013 at 03:17:21PM +0100, Andrew Lunn wrote: > The dove-cpufreq driver needs access to the DDR and CPU clock. There > is also an interrupt generated when the DFS hardware completes a > change of frequencey. Add these to the cpu node in DT. > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> > --- > arch/arm/boot/dts/dove.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi > index 4c8028513133..3842ba02dddf 100644 > --- a/arch/arm/boot/dts/dove.dtsi > +++ b/arch/arm/boot/dts/dove.dtsi > @@ -22,6 +22,10 @@ > device_type = "cpu"; > next-level-cache = <&l2>; > reg = <0>; > + clocks = <&core_clk 1>, <&core_clk 3>; This isn't a blocker by any means, but does anyone have on their TODO list a DT include file of macros for the clocks? So this would become: clocks = <&core_clk DOVE_CPU_CLK>, <&core_clk DOVE_DDRCLK>; or similar? If not, would it be considered useful? thx, Jason. > + clock-names = "cpu_clk", "ddrclk"; > + interrupt-parent = <&pmu_intc>; > + interrupts = <0>; > }; > }; > > -- > 1.8.5 >
On Wed, Dec 04, 2013 at 02:39:21PM +0000, Mark Rutland wrote: > Is ddrclk actually fed into the CPU? Given that you seem to have an > external L2 I don't see why the CPU would need the DDR clock. I see from the other patches that it's simply a misleading name. Sorry for the noise. Mark.
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 4c8028513133..3842ba02dddf 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -22,6 +22,10 @@ device_type = "cpu"; next-level-cache = <&l2>; reg = <0>; + clocks = <&core_clk 1>, <&core_clk 3>; + clock-names = "cpu_clk", "ddrclk"; + interrupt-parent = <&pmu_intc>; + interrupts = <0>; }; };