From patchwork Wed Dec 4 22:52:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 3285681 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3B5299F373 for ; Wed, 4 Dec 2013 22:57:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4D82C204EA for ; Wed, 4 Dec 2013 22:57:34 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3FFA4204A7 for ; Wed, 4 Dec 2013 22:57:33 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VoLMS-00082m-VH; Wed, 04 Dec 2013 22:56:05 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VoLM9-00040D-KI; Wed, 04 Dec 2013 22:55:45 +0000 Received: from tx2ehsobe002.messaging.microsoft.com ([65.55.88.12] helo=tx2outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VoLLk-0003wX-5o for linux-arm-kernel@lists.infradead.org; Wed, 04 Dec 2013 22:55:23 +0000 Received: from mail166-tx2-R.bigfish.com (10.9.14.239) by TX2EHSOBE014.bigfish.com (10.9.40.34) with Microsoft SMTP Server id 14.1.225.22; Wed, 4 Dec 2013 22:54:58 +0000 Received: from mail166-tx2 (localhost [127.0.0.1]) by mail166-tx2-R.bigfish.com (Postfix) with ESMTP id 879602E00FF; Wed, 4 Dec 2013 22:54:58 +0000 (UTC) X-Forefront-Antispam-Report: CIP:66.35.236.232; KIP:(null); UIP:(null); IPV:NLI; H:SJ-ITEXEDGE02.altera.priv.altera.com; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zzzz1f42h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6hz70kz1de098h8275bh1de097hz2fh2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14ddh1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah224fh1d0ch1d2eh1d3fh1dfeh1dffh1e1dh1e23h1fe8h1ff5h2218h2216h226dh22d0h2327h2336h1155h) Received-SPF: pass (mail166-tx2: domain of altera.com designates 66.35.236.232 as permitted sender) client-ip=66.35.236.232; envelope-from=dinguyen@altera.com; helo=SJ-ITEXEDGE02.altera.priv.altera.com ; v.altera.com ; Received: from mail166-tx2 (localhost.localdomain [127.0.0.1]) by mail166-tx2 (MessageSwitch) id 1386197695766320_16091; Wed, 4 Dec 2013 22:54:55 +0000 (UTC) Received: from TX2EHSMHS036.bigfish.com (unknown [10.9.14.240]) by mail166-tx2.bigfish.com (Postfix) with ESMTP id B34D4320242; Wed, 4 Dec 2013 22:54:55 +0000 (UTC) Received: from SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) by TX2EHSMHS036.bigfish.com (10.9.99.136) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 4 Dec 2013 22:54:53 +0000 Received: from sj-mail01.altera.com (137.57.1.6) by SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) with Microsoft SMTP Server id 8.3.327.1; Wed, 4 Dec 2013 14:43:01 -0800 Received: from linux-builds1.altera.com (linux-builds1.altera.com [137.57.188.114]) by sj-mail01.altera.com (8.13.7+Sun/8.13.7) with ESMTP id rB4Msjne002799; Wed, 4 Dec 2013 14:54:51 -0800 (PST) From: To: , , , , , , , , , Subject: [PATCHv3 4/4] arm: dts: Add support for SD/MMC on SOCFPGA Date: Wed, 4 Dec 2013 16:52:56 -0600 Message-ID: <1386197576-3825-5-git-send-email-dinguyen@altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1386197576-3825-1-git-send-email-dinguyen@altera.com> References: <1386197576-3825-1-git-send-email-dinguyen@altera.com> MIME-Version: 1.0 X-OriginatorOrg: altera.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131204_175520_489579_A52F4052 X-CRM114-Status: GOOD ( 12.35 ) X-Spam-Score: -4.2 (----) Cc: devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, Dinh Nguyen , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dinh Nguyen Add new bindings that support SD/MMC on Altera's SOCFPGA platform. Signed-off-by: Dinh Nguyen --- v3: none v2: none --- .../devicetree/bindings/mmc/socfpga-dw-mshc.txt | 38 ++++++++++++++++++++ arch/arm/boot/dts/socfpga.dtsi | 11 ++++++ arch/arm/boot/dts/socfpga_cyclone5.dtsi | 12 +++++++ arch/arm/boot/dts/socfpga_vt.dts | 12 +++++++ 4 files changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt diff --git a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt new file mode 100644 index 0000000..c408e74 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt @@ -0,0 +1,38 @@ +* Altera SOCFPGA specific extensions to the Synopsys Designware Mobile + Storage Host Controller + +The Synopsys designware mobile storage host controller is used to interface +a SoC with storage medium such as eMMC or SD/MMC cards. This file documents +differences between the core Synopsys dw mshc controller properties described +by synopsys-dw-mshc.txt and the properties used by the SOCFPGA specific +extensions to the Synopsys Designware Mobile Storage Host Controller. + +Required Properties: + +* compatible: should be + - "altr,socfpga-dw-mshc": for controllers with Altera SOCFPGA + specific extensions. + +* samsung,dw-mshc-sdr-timing: See exynos-dw-mshc.txt for more information about + this property. + +Example: + dwmmc0@ff704000 { + compatible = "altr,socfpga-dw-mshc", "snps,dw-mshc"; + reg = <0xff704000 0x1000>; + interrupts = <0 139 4>; + fifo-depth = <0x400>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&l4_mp_clk>, <&sdmmc_clk>, <&sysmgr_sdr_mmc>; + clock-names = "biu", "ciu", "sysmgr-sdr-mmc"; + num-slots = <1>; + supports-highspeed; + broken-cd; + samsung,dw-mshc-sdr-timing = <3 0>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index a6a13b3..5023e25 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -469,6 +469,17 @@ cache-level = <2>; }; + mmc: dwmmc0@ff704000 { + compatible = "altr,socfpga-dw-mshc"; + reg = <0xff704000 0x1000>; + interrupts = <0 139 4>; + fifo-depth = <0x400>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&l4_mp_clk>, <&sdmmc_clk>, <&sysmgr_sdr_mmc>; + clock-names = "biu", "ciu", "sysmgr-sdr-mmc"; + }; + /* Local timer */ timer@fffec600 { compatible = "arm,cortex-a9-twd-timer"; diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index a8716f6..4ef4fa4 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -28,6 +28,18 @@ }; }; + dwmmc0@ff704000 { + num-slots = <1>; + supports-highspeed; + broken-cd; + samsung,dw-mshc-sdr-timing = <3 0>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; + ethernet@ff702000 { phy-mode = "rgmii"; phy-addr = <0xffffffff>; /* probe for phy addr */ diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts index d1ec0ca..25b2653 100644 --- a/arch/arm/boot/dts/socfpga_vt.dts +++ b/arch/arm/boot/dts/socfpga_vt.dts @@ -41,6 +41,18 @@ }; }; + dwmmc0@ff704000 { + num-slots = <1>; + supports-highspeed; + broken-cd; + samsung,dw-mshc-sdr-timing = <3 0>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; + ethernet@ff700000 { phy-mode = "gmii"; status = "okay";