| Message ID | 1386421734-10240-1-git-send-email-alexandre.belloni@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sat, Dec 7, 2013 at 2:08 PM, Alexandre Belloni
<alexandre.belloni@free-electrons.com> wrote:
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Patch applied.
Please include Laurent Pinchart on the To: line on AT91 pin control
patches.
Yours,
Linus Walleij
Hi Linus, On Thursday 12 December 2013 15:42:28 Linus Walleij wrote: > On Sat, Dec 7, 2013 at 2:08 PM, Alexandre Belloni wrote: > > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > > Patch applied. > > Please include Laurent Pinchart on the To: line on AT91 pin control > patches. I understand that you would like patch to have a wide review coverage, but why me ? :-)
On Thu, Dec 12, 2013 at 3:47 PM, Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > Hi Linus, > > On Thursday 12 December 2013 15:42:28 Linus Walleij wrote: >> On Sat, Dec 7, 2013 at 2:08 PM, Alexandre Belloni wrote: >> > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> >> >> Patch applied. >> >> Please include Laurent Pinchart on the To: line on AT91 pin control >> patches. > > I understand that you would like patch to have a wide review coverage, but why > me ? :-) Bah nevermind, too much in my head, I confused AT91 for SH mobile nothing else... Nicolas and Jean-Christophe is on the list and all is well. Yours, Linus Walleij
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index a7549c4c83b4..6446dc804aa7 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -118,7 +118,7 @@ struct at91_pin_group { }; /** - * struct at91_pinctrl_mux_ops - describes an At91 mux ops group + * struct at91_pinctrl_mux_ops - describes an AT91 mux ops group * on new IP with support for periph C and D the way to mux in * periph A and B has changed * So provide the right call back @@ -1396,7 +1396,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) chained_irq_enter(chip, desc); for (;;) { /* Reading ISR acks pending (edge triggered) GPIO interrupts. - * When there none are pending, we're finished unless we need + * When there are none pending, we're finished unless we need * to process multiple banks (like ID_PIOCDE on sam9263). */ isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR); @@ -1505,7 +1505,7 @@ static int at91_gpio_of_irq_setup(struct device_node *node, prev = gpio_chips[at91_gpio->pioc_idx - 1]; /* The top level handler handles one bank of GPIOs, except - * on some SoC it can handles up to three... + * on some SoC it can handle up to three... * We only set up the handler for the first of the list. */ if (prev && prev->next == at91_gpio)
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> --- drivers/pinctrl/pinctrl-at91.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)