From patchwork Mon Dec 16 21:04:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 3356891 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6C2AA9F380 for ; Mon, 16 Dec 2013 21:05:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7A71720251 for ; Mon, 16 Dec 2013 21:05:40 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 41D822024D for ; Mon, 16 Dec 2013 21:05:39 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VsfM6-0001nz-9n; Mon, 16 Dec 2013 21:05:34 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VsfM3-0006Qn-F5; Mon, 16 Dec 2013 21:05:31 +0000 Received: from mail-we0-f175.google.com ([74.125.82.175]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VsfLy-0006Oq-KR for linux-arm-kernel@lists.infradead.org; Mon, 16 Dec 2013 21:05:27 +0000 Received: by mail-we0-f175.google.com with SMTP id t60so5139881wes.6 for ; Mon, 16 Dec 2013 13:05:01 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8S6wbnA/s+Vq3+45o3pVoruvHsAA7WgySxWSh2hc+6k=; b=KynD14MRGA6darbweI4uDYCnK4gvekJwf9KWHJWddxdtSJIv4WwEHZPtPakWQ70FJB K50YxoInXvVfUUEoGmtfmKvtAQJfdzoVXJiNAyX2PXilfROHYMQvItPfSlNyOKLu2oql hr7KKcuAx/HxEDOb1W/fnyKXkHiPHYuGcPM35pT+Hj5yVAbbAlI67HhcVZYTpePhsOUE S6DQiAL63Y+l4V3Featv9bJf0G8rzJcTEhyxKc0ZodLY//BHRo0YGJJr3ZHBl2RUxpy6 1aBqiuTVuno8ymwXl7f4HPY8ZLHRvkZ+05pXFUzwlQP5PSwBl/ok2jjffe6tHxez4LQB VupA== X-Gm-Message-State: ALoCoQkQ27hNErggDhCbuK+aRBgGfzoYDsry61CDUTr1NyUje71XY8vg1sFnAwPtasZBd943bE8Q X-Received: by 10.180.37.237 with SMTP id b13mr15691912wik.52.1387227901546; Mon, 16 Dec 2013 13:05:01 -0800 (PST) Received: from localhost.localdomain (82-169-5-66.ip.telfort.nl. [82.169.5.66]) by mx.google.com with ESMTPSA id fj8sm46381851wib.1.2013.12.16.13.04.59 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 16 Dec 2013 13:05:00 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@arm.linux.org.uk, catalin.marinas@arm.com, will.deacon@arm.com, steve.capper@linaro.org Subject: [PATCH 1/4] arm64: drop redundant macros from read_cpuid() Date: Mon, 16 Dec 2013 22:04:35 +0100 Message-Id: <1387227878-30438-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1387227878-30438-1-git-send-email-ard.biesheuvel@linaro.org> References: <1387227878-30438-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131216_160526_781865_ED9914B6 X-CRM114-Status: GOOD ( 10.32 ) X-Spam-Score: -2.6 (--) Cc: Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP asm/cputype.h contains a bunch of #defines for CPU id registers that essentially map to themselves. Remove the #defines and pass the tokens directly to the inline asm() that reads the registers. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/cputype.h | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 5fe138e..e1af1b4 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -16,23 +16,13 @@ #ifndef __ASM_CPUTYPE_H #define __ASM_CPUTYPE_H -#define ID_MIDR_EL1 "midr_el1" -#define ID_MPIDR_EL1 "mpidr_el1" -#define ID_CTR_EL0 "ctr_el0" - -#define ID_AA64PFR0_EL1 "id_aa64pfr0_el1" -#define ID_AA64DFR0_EL1 "id_aa64dfr0_el1" -#define ID_AA64AFR0_EL1 "id_aa64afr0_el1" -#define ID_AA64ISAR0_EL1 "id_aa64isar0_el1" -#define ID_AA64MMFR0_EL1 "id_aa64mmfr0_el1" - #define INVALID_HWID ULONG_MAX #define MPIDR_HWID_BITMASK 0xff00ffffff #define read_cpuid(reg) ({ \ u64 __val; \ - asm("mrs %0, " reg : "=r" (__val)); \ + asm("mrs %0, " #reg : "=r" (__val)); \ __val; \ }) @@ -54,12 +44,12 @@ */ static inline u32 __attribute_const__ read_cpuid_id(void) { - return read_cpuid(ID_MIDR_EL1); + return read_cpuid(MIDR_EL1); } static inline u64 __attribute_const__ read_cpuid_mpidr(void) { - return read_cpuid(ID_MPIDR_EL1); + return read_cpuid(MPIDR_EL1); } static inline unsigned int __attribute_const__ read_cpuid_implementor(void) @@ -74,7 +64,7 @@ static inline unsigned int __attribute_const__ read_cpuid_part_number(void) static inline u32 __attribute_const__ read_cpuid_cachetype(void) { - return read_cpuid(ID_CTR_EL0); + return read_cpuid(CTR_EL0); } #endif /* __ASSEMBLY__ */