From patchwork Tue Dec 17 09:26:37 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 3359921 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C8D94C0D4A for ; Tue, 17 Dec 2013 09:28:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9590520398 for ; Tue, 17 Dec 2013 09:28:04 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BE5F920397 for ; Tue, 17 Dec 2013 09:27:59 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vsqw9-0002o7-4f; Tue, 17 Dec 2013 09:27:33 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vsqw2-0006Eu-1e; Tue, 17 Dec 2013 09:27:26 +0000 Received: from hqemgate16.nvidia.com ([216.228.121.65]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vsqvo-0006BU-AQ for linux-arm-kernel@lists.infradead.org; Tue, 17 Dec 2013 09:27:13 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 17 Dec 2013 01:26:52 -0800 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 17 Dec 2013 01:28:11 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 17 Dec 2013 01:28:11 -0800 Received: from jlo-ubuntu-64.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.327.1; Tue, 17 Dec 2013 01:26:49 -0800 From: Joseph Lo To: Stephen Warren , Thierry Reding , Peter De Schrijver Subject: [PATCH 1/4] ARM: tegra: moving tegra_bct_strapping to tegra-soc.h for global visibility Date: Tue, 17 Dec 2013 17:26:37 +0800 Message-ID: <1387272400-4689-2-git-send-email-josephl@nvidia.com> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1387272400-4689-1-git-send-email-josephl@nvidia.com> References: <1387272400-4689-1-git-send-email-josephl@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131217_042712_485989_696158D5 X-CRM114-Status: GOOD ( 11.72 ) X-Spam-Score: -2.4 (--) Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch moves the tegra_btc_strapping variable to the tegra-soc.h for the global visibility that the other Tegra device driver can access it. It also a preparation that we can move out the Tegra20 EMC driver from mach-tegra to the drivers folder. Signed-off-by: Joseph Lo --- arch/arm/mach-tegra/fuse.h | 2 -- arch/arm/mach-tegra/tegra20_speedo.c | 1 + arch/arm/mach-tegra/tegra2_emc.c | 2 +- include/linux/tegra-soc.h | 2 ++ 4 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h index c01d04785d67..44945c8b5d17 100644 --- a/arch/arm/mach-tegra/fuse.h +++ b/arch/arm/mach-tegra/fuse.h @@ -50,8 +50,6 @@ extern int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */ extern int tegra_soc_speedo_id; extern enum tegra_revision tegra_revision; -extern int tegra_bct_strapping; - unsigned long long tegra_chip_uid(void); void tegra_init_fuse(void); bool tegra_spare_fuse(int bit); diff --git a/arch/arm/mach-tegra/tegra20_speedo.c b/arch/arm/mach-tegra/tegra20_speedo.c index fa6eb570623f..3b1bb5360a92 100644 --- a/arch/arm/mach-tegra/tegra20_speedo.c +++ b/arch/arm/mach-tegra/tegra20_speedo.c @@ -16,6 +16,7 @@ #include #include +#include #include "fuse.h" diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c index 3ae4a7f1a2fb..26e4edbd8a6a 100644 --- a/arch/arm/mach-tegra/tegra2_emc.c +++ b/arch/arm/mach-tegra/tegra2_emc.c @@ -24,9 +24,9 @@ #include #include #include +#include #include "tegra2_emc.h" -#include "fuse.h" #ifdef CONFIG_TEGRA_EMC_SCALING_ENABLE static bool emc_enable = true; diff --git a/include/linux/tegra-soc.h b/include/linux/tegra-soc.h index 95f611d78f3a..2e02a9a033c5 100644 --- a/include/linux/tegra-soc.h +++ b/include/linux/tegra-soc.h @@ -17,6 +17,8 @@ #ifndef __LINUX_TEGRA_SOC_H_ #define __LINUX_TEGRA_SOC_H_ +extern int tegra_bct_strapping; + u32 tegra_read_chipid(void); #endif /* __LINUX_TEGRA_SOC_H_ */