From patchwork Tue Dec 17 09:26:39 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 3359931 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 36C20C0D4A for ; Tue, 17 Dec 2013 09:28:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 06E1520398 for ; Tue, 17 Dec 2013 09:28:34 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1817520397 for ; Tue, 17 Dec 2013 09:28:29 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VsqwK-0002wG-Q8; Tue, 17 Dec 2013 09:27:45 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VsqwB-0006FV-RC; Tue, 17 Dec 2013 09:27:35 +0000 Received: from hqemgate14.nvidia.com ([216.228.121.143]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vsqvr-0006C7-Lq for linux-arm-kernel@lists.infradead.org; Tue, 17 Dec 2013 09:27:19 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Tue, 17 Dec 2013 01:26:42 -0800 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 17 Dec 2013 01:28:18 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 17 Dec 2013 01:28:18 -0800 Received: from jlo-ubuntu-64.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.327.1; Tue, 17 Dec 2013 01:26:55 -0800 From: Joseph Lo To: Stephen Warren , Thierry Reding , Peter De Schrijver Subject: [PATCH 3/4] memory: tegra20-emc: move out Tegra20 EMC driver from mach-tegra Date: Tue, 17 Dec 2013 17:26:39 +0800 Message-ID: <1387272400-4689-4-git-send-email-josephl@nvidia.com> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1387272400-4689-1-git-send-email-josephl@nvidia.com> References: <1387272400-4689-1-git-send-email-josephl@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131217_042716_006236_E4FFB5BE X-CRM114-Status: GOOD ( 19.06 ) X-Spam-Score: -2.4 (--) Cc: linux-tegra@vger.kernel.org, Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, Joseph Lo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch moves out the Tegra20 EMC driver from mach-tegra to the drivers/memory folder. And register the EMC driver to the EMC interface of the Tegra CCF driver. Signed-off-by: Joseph Lo --- Cc: Greg Kroah-Hartman --- arch/arm/mach-tegra/Makefile | 1 - arch/arm/mach-tegra/tegra2_emc.h | 24 ---------------------- drivers/memory/Kconfig | 10 +++++++++ drivers/memory/Makefile | 1 + .../tegra2_emc.c => drivers/memory/tegra20-emc.c | 14 +++++++++---- 5 files changed, 21 insertions(+), 29 deletions(-) delete mode 100644 arch/arm/mach-tegra/tegra2_emc.h rename arch/arm/mach-tegra/tegra2_emc.c => drivers/memory/tegra20-emc.c (95%) diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 019bb1758662..6fbfbb77dcd9 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -14,7 +14,6 @@ obj-y += sleep.o obj-y += tegra.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_speedo.o -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o ifeq ($(CONFIG_CPU_IDLE),y) diff --git a/arch/arm/mach-tegra/tegra2_emc.h b/arch/arm/mach-tegra/tegra2_emc.h deleted file mode 100644 index f61409b54cb7..000000000000 --- a/arch/arm/mach-tegra/tegra2_emc.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2011 Google, Inc. - * - * Author: - * Colin Cross - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_TEGRA2_EMC_H_ -#define __MACH_TEGRA_TEGRA2_EMC_H - -int tegra_emc_set_rate(unsigned long rate); -long tegra_emc_round_rate(unsigned long rate); - -#endif diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 29a11db365bc..55017b9bdb6b 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -40,6 +40,16 @@ config TEGRA20_MC analysis, especially for IOMMU/GART(Graphics Address Relocation Table) module. +config TEGRA20_EMC + bool "Tegra20 External Memory Controller(EMC) driver" + default y + depends on ARCH_TEGRA_2x_SOC + help + This driver is for the External Memory Controller(EMC) module + available in Tegra20 SoCs. It was used for setting up the timing + in the EMC registers when scaling the memory frequency. To enable + the function, you should also say Y in TEGRA_EMC_SCALING_ENABLE. + config TEGRA30_MC bool "Tegra30 Memory Controller(MC) driver" default y diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index 969d923dad93..23e920dd4ebf 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -7,5 +7,6 @@ obj-$(CONFIG_OF) += of_memory.o endif obj-$(CONFIG_TI_EMIF) += emif.o obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o +obj-$(CONFIG_TEGRA20_EMC) += tegra20-emc.o obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o obj-$(CONFIG_TEGRA30_MC) += tegra30-mc.o diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/drivers/memory/tegra20-emc.c similarity index 95% rename from arch/arm/mach-tegra/tegra2_emc.c rename to drivers/memory/tegra20-emc.c index 26e4edbd8a6a..de2a89089b1a 100644 --- a/arch/arm/mach-tegra/tegra2_emc.c +++ b/drivers/memory/tegra20-emc.c @@ -26,8 +26,6 @@ #include #include -#include "tegra2_emc.h" - #ifdef CONFIG_TEGRA_EMC_SCALING_ENABLE static bool emc_enable = true; #else @@ -98,7 +96,7 @@ static const unsigned long emc_reg_addr[TEGRA_EMC_NUM_REGS] = { }; /* Select the closest EMC rate that is higher than the requested rate */ -long tegra_emc_round_rate(unsigned long rate) +static long tegra20_emc_round_rate(unsigned long rate) { struct tegra_emc_pdata *pdata; int i; @@ -142,7 +140,7 @@ long tegra_emc_round_rate(unsigned long rate) * and relies on the clock lock on the emc clock to avoid races between * multiple frequency changes */ -int tegra_emc_set_rate(unsigned long rate) +static int tegra20_emc_set_rate(unsigned long rate) { struct tegra_emc_pdata *pdata; int i; @@ -296,6 +294,11 @@ static struct tegra_emc_pdata *tegra_emc_fill_pdata(struct platform_device *pdev return pdata; } +static const struct emc_clk_ops tegra20_emc_clk_ops = { + .emc_round_rate = tegra20_emc_round_rate, + .emc_set_rate = tegra20_emc_set_rate, +}; + static int tegra_emc_probe(struct platform_device *pdev) { struct tegra_emc_pdata *pdata; @@ -323,6 +326,9 @@ static int tegra_emc_probe(struct platform_device *pdev) emc_pdev = pdev; + tegra_register_emc_clk_ops(clk_get_sys(NULL, "emc"), + &tegra20_emc_clk_ops); + return 0; }