From patchwork Thu Dec 19 11:23:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 3378961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 593DEC0D4A for ; Thu, 19 Dec 2013 12:30:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AD0D520519 for ; Thu, 19 Dec 2013 12:30:30 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EA49A20555 for ; Thu, 19 Dec 2013 12:30:25 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VtblP-0008TB-23; Thu, 19 Dec 2013 11:27:36 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vtbkn-0004RD-S4; Thu, 19 Dec 2013 11:26:57 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vtbj9-00044x-TW for linux-arm-kernel@lists.infradead.org; Thu, 19 Dec 2013 11:25:17 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id rBJBOumJ004498; Thu, 19 Dec 2013 05:24:56 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id rBJBOuSG014909; Thu, 19 Dec 2013 05:24:56 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Thu, 19 Dec 2013 05:24:55 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id rBJBOUh1009888; Thu, 19 Dec 2013 05:24:53 -0600 From: Tero Kristo To: , , , , , , Subject: [PATCHv11 07/49] clk: divider: add support for low level ops Date: Thu, 19 Dec 2013 13:23:38 +0200 Message-ID: <1387452260-23276-8-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1387452260-23276-1-git-send-email-t-kristo@ti.com> References: <1387452260-23276-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131219_062516_086180_F9234EEC X-CRM114-Status: GOOD ( 14.23 ) X-Spam-Score: -7.4 (-------) Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Divider clock can now be registered to use low level register access ops. Preferred initialization method is via clock description. Signed-off-by: Tero Kristo --- drivers/clk/clk-divider.c | 11 ++++++++--- include/linux/clk-provider.h | 4 ++++ 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 8cfed5c..61ab30e 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -108,7 +108,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, struct clk_divider *divider = to_clk_divider(hw); unsigned int div, val; - val = clk_readl(divider->reg) >> divider->shift; + val = divider->ll_ops->clk_readl(divider->reg) >> divider->shift; val &= div_mask(divider); div = _get_div(divider, val); @@ -234,11 +234,11 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { val = div_mask(divider) << (divider->shift + 16); } else { - val = clk_readl(divider->reg); + val = divider->ll_ops->clk_readl(divider->reg); val &= ~(div_mask(divider) << divider->shift); } val |= value << divider->shift; - clk_writel(val, divider->reg); + divider->ll_ops->clk_writel(val, divider->reg); if (divider->lock) spin_unlock_irqrestore(divider->lock, flags); @@ -291,6 +291,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, div->lock = lock; div->hw.init = &init; div->table = table; + div->ll_ops = &clk_ll_ops_default; /* register the clock */ clk = clk_register(dev, &div->hw); @@ -368,6 +369,10 @@ struct clk_hw *clk_register_divider_desc(struct device *dev, divider->flags = hw_desc->flags; divider->table = hw_desc->table; divider->lock = hw_desc->lock; + divider->ll_ops = hw_desc->ll_ops; + + if (!divider->ll_ops) + divider->ll_ops = &clk_ll_ops_default; if (!desc->ops) desc->ops = &clk_divider_ops; diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index cc5bee0..3a88346 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -320,6 +320,7 @@ struct clk_div_table { * * @hw: handle between common and hardware-specific interfaces * @reg: register containing the divider + * @ll_ops: low-level ops for accessing the register * @shift: shift to the divider bit field * @width: width of the divider bit field * @table: array of value/divider pairs, last entry should have div = 0 @@ -348,6 +349,7 @@ struct clk_div_table { struct clk_divider { struct clk_hw hw; void __iomem *reg; + struct clk_ll_ops *ll_ops; u8 shift; u8 width; u8 flags; @@ -360,6 +362,7 @@ struct clk_divider { * * @desc: handle between common and hardware-specific interfaces * @reg: register containing the divider + * @ll_ops: low-level ops for accessing the register * @shift: shift to the divider bit field * @width: width of the divider bit field * @table: array of value/divider pairs, last entry should have div = 0 @@ -368,6 +371,7 @@ struct clk_divider { struct clk_divider_desc { struct clk_desc desc; void __iomem *reg; + struct clk_ll_ops *ll_ops; u8 shift; u8 width; u8 flags;