From patchwork Fri Dec 27 11:24:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yao yuan X-Patchwork-Id: 3411911 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DED75C02DC for ; Fri, 27 Dec 2013 12:18:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AE48B2015E for ; Fri, 27 Dec 2013 12:18:58 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CA5332014A for ; Fri, 27 Dec 2013 12:18:56 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VwWNE-00028Z-EH; Fri, 27 Dec 2013 12:18:40 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VwWNC-0007CK-0t; Fri, 27 Dec 2013 12:18:38 +0000 Received: from va3ehsobe006.messaging.microsoft.com ([216.32.180.16] helo=va3outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VwWN7-0007Bb-GH for linux-arm-kernel@lists.infradead.org; Fri, 27 Dec 2013 12:18:34 +0000 Received: from mail35-va3-R.bigfish.com (10.7.14.236) by VA3EHSOBE005.bigfish.com (10.7.40.25) with Microsoft SMTP Server id 14.1.225.22; Fri, 27 Dec 2013 12:18:11 +0000 Received: from mail35-va3 (localhost [127.0.0.1]) by mail35-va3-R.bigfish.com (Postfix) with ESMTP id 479654800C2; Fri, 27 Dec 2013 12:18:11 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dc1h1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h2327h2336h1155h) Received: from mail35-va3 (localhost.localdomain [127.0.0.1]) by mail35-va3 (MessageSwitch) id 1388146688393899_7967; Fri, 27 Dec 2013 12:18:08 +0000 (UTC) Received: from VA3EHSMHS019.bigfish.com (unknown [10.7.14.226]) by mail35-va3.bigfish.com (Postfix) with ESMTP id 576A12A004C; Fri, 27 Dec 2013 12:18:08 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS019.bigfish.com (10.7.99.29) with Microsoft SMTP Server (TLS) id 14.16.227.3; Fri, 27 Dec 2013 12:18:07 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.3.158.2; Fri, 27 Dec 2013 12:18:06 +0000 Received: from rock.am.freescale.net (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id rBRCI4XY008947; Fri, 27 Dec 2013 05:18:04 -0700 From: Yuan Yao To: Subject: [PATCH] the eDMA support for the LPUART send driver Date: Fri, 27 Dec 2013 19:24:09 +0800 Message-ID: <1388143449-28640-1-git-send-email-yao.yuan@freescale.com> X-Mailer: git-send-email 1.8.0 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131227_071833_654781_3415CD0B X-CRM114-Status: GOOD ( 17.42 ) X-Spam-Score: -4.2 (----) Cc: linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch add eDMA support for LPUART send function. Signed-off-by: Yuan Yao --- arch/arm/boot/dts/vf610.dtsi | 12 +++ drivers/tty/serial/fsl_lpuart.c | 187 ++++++++++++++++++++++++++++++++-------- 2 files changed, 163 insertions(+), 36 deletions(-) diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi index 365e0fa..35d7a79 100644 --- a/arch/arm/boot/dts/vf610.dtsi +++ b/arch/arm/boot/dts/vf610.dtsi @@ -118,6 +118,9 @@ interrupts = <0 61 0x00>; clocks = <&clks VF610_CLK_UART0>; clock-names = "ipg"; + dma-names = "lpuart-rx","lpuart-tx"; + dmas = <&edma0 0 VF610_EDMA_MUXID0_UART0_RX>, + <&edma0 0 VF610_EDMA_MUXID0_UART0_TX>; status = "disabled"; }; @@ -127,6 +130,9 @@ interrupts = <0 62 0x04>; clocks = <&clks VF610_CLK_UART1>; clock-names = "ipg"; + dma-names = "lpuart-rx","lpuart-tx"; + dmas = <&edma0 0 VF610_EDMA_MUXID0_UART1_RX>, + <&edma0 0 VF610_EDMA_MUXID0_UART1_TX>; status = "disabled"; }; @@ -136,6 +142,9 @@ interrupts = <0 63 0x04>; clocks = <&clks VF610_CLK_UART2>; clock-names = "ipg"; + dma-names = "lpuart-rx","lpuart-tx"; + dmas = <&edma0 0 VF610_EDMA_MUXID0_UART2_RX>, + <&edma0 0 VF610_EDMA_MUXID0_UART2_TX>; status = "disabled"; }; @@ -145,6 +154,9 @@ interrupts = <0 64 0x04>; clocks = <&clks VF610_CLK_UART3>; clock-names = "ipg"; + dma-names = "lpuart-rx","lpuart-tx"; + dmas = <&edma0 0 VF610_EDMA_MUXID0_UART3_RX>, + <&edma0 0 VF610_EDMA_MUXID0_UART3_TX>; status = "disabled"; }; diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 8978dc9..8375141 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -13,14 +13,19 @@ #define SUPPORT_SYSRQ #endif -#include +#include +#include +#include +#include +#include #include #include -#include +#include #include #include -#include +#include #include +#include #include /* All registers are 8-bit width */ @@ -112,6 +117,9 @@ #define UARTSFIFO_TXOF 0x02 #define UARTSFIFO_RXUF 0x01 +#define DMA_MAXBURST 16 +#define DMA_MAXBURST_MASK (DMA_MAXBURST - 1) + #define DRIVER_NAME "fsl-lpuart" #define DEV_NAME "ttyLP" #define UART_NR 6 @@ -121,6 +129,13 @@ struct lpuart_port { struct clk *clk; unsigned int txfifo_size; unsigned int rxfifo_size; + struct dma_chan *tx_dma_lpuart; + struct dma_async_tx_descriptor *tx_dma_desc; + dma_addr_t tx_dma_buf_phys; + dma_cookie_t tx_cookie; + unsigned char *tx_dma_buf_virt; + unsigned int tx_bytes; + int tx_in_progress; }; static struct of_device_id lpuart_dt_ids[] = { @@ -131,6 +146,9 @@ static struct of_device_id lpuart_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, lpuart_dt_ids); +static int lpuart_dma_tx(struct lpuart_port *sport, unsigned long count); +static void lpuart_prepare_tx(struct lpuart_port *sport); + static void lpuart_stop_tx(struct uart_port *port) { unsigned char temp; @@ -152,12 +170,36 @@ static void lpuart_enable_ms(struct uart_port *port) { } -static inline void lpuart_transmit_buffer(struct lpuart_port *sport) +static void lpuart_dma_tx_complete(void *arg) +{ + struct lpuart_port *sport = arg; + struct circ_buf *xmit = &sport->port.state->xmit; + unsigned long flags; + + async_tx_ack(sport->tx_dma_desc); + + spin_lock_irqsave(&sport->port.lock, flags); + + xmit->tail = (xmit->tail + sport->tx_bytes) & (UART_XMIT_SIZE - 1); + sport->tx_in_progress = 0; + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(&sport->port); + + lpuart_prepare_tx(sport); + + spin_unlock_irqrestore(&sport->port.lock, flags); +} + +static void lpuart_pio_tx(struct lpuart_port *sport) { struct circ_buf *xmit = &sport->port.state->xmit; + unsigned long flags; + + spin_lock_irqsave(&sport->port.lock, flags); while (!uart_circ_empty(xmit) && - (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { + readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size) { writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); sport->port.icount.tx++; @@ -167,46 +211,69 @@ static inline void lpuart_transmit_buffer(struct lpuart_port *sport) uart_write_wakeup(&sport->port); if (uart_circ_empty(xmit)) - lpuart_stop_tx(&sport->port); -} + writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS, + sport->port.membase + UARTCR5); -static void lpuart_start_tx(struct uart_port *port) + spin_unlock_irqrestore(&sport->port.lock, flags); +} + +static int lpuart_dma_tx(struct lpuart_port *sport, unsigned long count) { - struct lpuart_port *sport = container_of(port, struct lpuart_port, port); - unsigned char temp; + struct circ_buf *xmit = &sport->port.state->xmit; + dma_addr_t tx_phys_addr; + + dma_sync_single_for_device(sport->port.dev, sport->tx_dma_buf_phys, + UART_XMIT_SIZE, DMA_TO_DEVICE); + sport->tx_bytes = count & ~(DMA_MAXBURST_MASK); + tx_phys_addr = sport->tx_dma_buf_phys + xmit->tail; + sport->tx_dma_desc = dmaengine_prep_slave_single(sport->tx_dma_lpuart, + tx_phys_addr, sport->tx_bytes, + DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT); + + if (!sport->tx_dma_desc) { + dev_err(sport->port.dev, "Not able to get desc for Tx\n"); + return -EIO; + } - temp = readb(port->membase + UARTCR2); - writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); + sport->tx_dma_desc->callback = lpuart_dma_tx_complete; + sport->tx_dma_desc->callback_param = sport; + sport->tx_in_progress = 1; + sport->tx_cookie = dmaengine_submit(sport->tx_dma_desc); + dma_async_issue_pending(sport->tx_dma_lpuart); - if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) - lpuart_transmit_buffer(sport); + return 0; } -static irqreturn_t lpuart_txint(int irq, void *dev_id) +static void lpuart_prepare_tx(struct lpuart_port *sport) { - struct lpuart_port *sport = dev_id; struct circ_buf *xmit = &sport->port.state->xmit; - unsigned long flags; + unsigned long count = CIRC_CNT_TO_END(xmit->head, + xmit->tail, UART_XMIT_SIZE); - spin_lock_irqsave(&sport->port.lock, flags); - if (sport->port.x_char) { - writeb(sport->port.x_char, sport->port.membase + UARTDR); - goto out; - } - - if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { - lpuart_stop_tx(&sport->port); - goto out; - } + if (!count) + return; - lpuart_transmit_buffer(sport); + if (count < DMA_MAXBURST) + writeb(readb(sport->port.membase + UARTCR5) & ~UARTCR5_TDMAS, + sport->port.membase + UARTCR5); + else + lpuart_dma_tx(sport, count); +} + +static void lpuart_start_tx(struct uart_port *port) +{ + struct lpuart_port *sport = container_of(port, + struct lpuart_port, port); + struct circ_buf *xmit = &sport->port.state->xmit; + unsigned char temp; - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(&sport->port); + temp = readb(port->membase + UARTCR2); + writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); + temp = readb(port->membase + UARTCR5); + writeb(temp | UARTCR5_TDMAS, port->membase + UARTCR5); -out: - spin_unlock_irqrestore(&sport->port.lock, flags); - return IRQ_HANDLED; + if (!uart_circ_empty(xmit) && !sport->tx_in_progress) + lpuart_prepare_tx(sport); } static irqreturn_t lpuart_rxint(int irq, void *dev_id) @@ -283,8 +346,9 @@ static irqreturn_t lpuart_int(int irq, void *dev_id) lpuart_rxint(irq, dev_id); if (sts & UARTSR1_TDRE && - !(readb(sport->port.membase + UARTCR5) & UARTCR5_TDMAS)) - lpuart_txint(irq, dev_id); + !(readb(sport->port.membase + UARTCR5) & UARTCR5_TDMAS)) { + lpuart_pio_tx(sport); + } return IRQ_HANDLED; } @@ -366,13 +430,60 @@ static void lpuart_setup_watermark(struct lpuart_port *sport) writeb(UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); - writeb(2, sport->port.membase + UARTTWFIFO); + writeb(0, sport->port.membase + UARTTWFIFO); writeb(1, sport->port.membase + UARTRWFIFO); /* Restore cr2 */ writeb(cr2_saved, sport->port.membase + UARTCR2); } +static int fsl_request_dma(struct uart_port *port) +{ + struct lpuart_port *sport = container_of(port, + struct lpuart_port, port); + struct dma_chan *tx_chan; + struct dma_slave_config dma_tx_sconfig; + dma_addr_t dma_phys; + unsigned char *dma_buf; + int ret; + + tx_chan = dma_request_slave_channel(sport->port.dev, "lpuart-tx"); + + if (!tx_chan) { + dev_err(sport->port.dev, "Dma TX channel request failed!\n"); + return -ENODEV; + } + + dma_phys = dma_map_single(sport->port.dev, + sport->port.state->xmit.buf, + UART_XMIT_SIZE, DMA_TO_DEVICE); + + if (!dma_phys) { + dev_err(sport->port.dev, "Dma_phys single failed\n"); + return -ENOMEM; + } + + dma_buf = sport->port.state->xmit.buf; + dma_tx_sconfig.dst_addr = sport->port.mapbase + UARTDR; + dma_tx_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; + dma_tx_sconfig.dst_maxburst = DMA_MAXBURST; + dma_tx_sconfig.direction = DMA_MEM_TO_DEV; + ret = dmaengine_slave_config(tx_chan, &dma_tx_sconfig); + + if (ret < 0) { + dev_err(sport->port.dev, + "Dma slave config failed, err = %d\n", ret); + return ret; + } + + sport->tx_dma_lpuart = tx_chan; + sport->tx_dma_buf_virt = dma_buf; + sport->tx_dma_buf_phys = dma_phys; + sport->tx_in_progress = 0; + + return 0; +} + static int lpuart_startup(struct uart_port *port) { struct lpuart_port *sport = container_of(port, struct lpuart_port, port); @@ -380,6 +491,7 @@ static int lpuart_startup(struct uart_port *port) unsigned long flags; unsigned char temp; + fsl_request_dma(port); ret = devm_request_irq(port->dev, port->irq, lpuart_int, 0, DRIVER_NAME, sport); if (ret) @@ -393,6 +505,9 @@ static int lpuart_startup(struct uart_port *port) temp |= (UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE); writeb(temp, sport->port.membase + UARTCR2); + temp = readb(port->membase + UARTCR5); + writeb(temp | UARTCR5_TDMAS, port->membase + UARTCR5); + spin_unlock_irqrestore(&sport->port.lock, flags); return 0; }