From patchwork Thu Jan 9 17:19:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 3462701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BF7229F2E9 for ; Thu, 9 Jan 2014 17:28:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A9AF12013A for ; Thu, 9 Jan 2014 17:28:44 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6F97D200DF for ; Thu, 9 Jan 2014 17:28:43 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1JNo-0001Wq-Fr; Thu, 09 Jan 2014 17:27:05 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1JNH-00042Y-W6; Thu, 09 Jan 2014 17:26:32 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1JMY-0003xr-ON for linux-arm-kernel@lists.infradead.org; Thu, 09 Jan 2014 17:25:49 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 3AE5E83D; Thu, 9 Jan 2014 18:25:08 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (189.58.26.109.rev.sfr.net [109.26.58.189]) by mail.free-electrons.com (Postfix) with ESMTPSA id EBBAD81D; Thu, 9 Jan 2014 18:25:07 +0100 (CET) From: Maxime Ripard To: Wolfram Sang Subject: [PATCH 1/5] i2c: mv64xxx: Add reset deassert call Date: Thu, 9 Jan 2014 18:19:59 +0100 Message-Id: <1389288003-23187-2-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1389288003-23187-1-git-send-email-maxime.ripard@free-electrons.com> References: <1389288003-23187-1-git-send-email-maxime.ripard@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140109_122547_016227_F59AF12F X-CRM114-Status: GOOD ( 10.80 ) X-Spam-Score: -1.2 (-) Cc: zhuzhenhua@allwinnertech.com, linux-sunxi@googlegroups.com, linux-i2c@vger.kernel.org, sunny@allwinnertech.com, shuge@allwinnertech.com, Maxime Ripard , duanmintao@allwinnertech.com, linux-arm-kernel@lists.infradead.org, kevin.z.m.zh@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Allwinner A31 SoC using that IP has a reset controller maintaining it reset unless told otherwise. Add some optional reset support to the driver. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt | 1 + drivers/i2c/busses/Kconfig | 1 + drivers/i2c/busses/i2c-mv64xxx.c | 6 ++++++ 3 files changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt index 82e8f6f..603003a 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt @@ -12,6 +12,7 @@ Optional properties : - clock-frequency : Desired I2C bus clock frequency in Hz. If not set the default frequency is 100kHz + - resets : phandle to the parent reset controller Examples: diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 3b26129..69aa599 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -528,6 +528,7 @@ config I2C_MPC config I2C_MV64XXX tristate "Marvell mv64xxx I2C Controller" depends on (MV64X60 || PLAT_ORION || ARCH_SUNXI) + select RESET_CONTROLLER help If you say yes to this option, support will be included for the built-in I2C interface on the Marvell 64xxx line of host bridges. diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index 8be7e42..d4e2f32 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -743,6 +744,7 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, #else const struct of_device_id *device; struct device_node *np = dev->of_node; + struct reset_control *rstc; u32 bus_freq, tclk; int rc = 0; @@ -763,6 +765,10 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, } drv_data->irq = irq_of_parse_and_map(np, 0); + rstc = devm_reset_control_get(dev, NULL); + if (!IS_ERR(rstc)) + reset_control_deassert(rstc); + /* Its not yet defined how timeouts will be specified in device tree. * So hard code the value to 1 second. */