From patchwork Thu Jan 9 17:20:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 3462691 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 54C04C02DC for ; Thu, 9 Jan 2014 17:28:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4BE4F2013A for ; Thu, 9 Jan 2014 17:28:12 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 15B47200DF for ; Thu, 9 Jan 2014 17:28:11 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1JNV-0001PT-1J; Thu, 09 Jan 2014 17:26:45 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1JN9-00041i-9Q; Thu, 09 Jan 2014 17:26:23 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1JMD-0003wZ-J9 for linux-arm-kernel@lists.infradead.org; Thu, 09 Jan 2014 17:25:28 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id A29F6823; Thu, 9 Jan 2014 18:25:06 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (189.58.26.109.rev.sfr.net [109.26.58.189]) by mail.free-electrons.com (Postfix) with ESMTPSA id 5DD947B3; Thu, 9 Jan 2014 18:25:06 +0100 (CET) From: Maxime Ripard To: Wolfram Sang Subject: [PATCH 3/5] ARM: sun6i: Enable the I2C controllers Date: Thu, 9 Jan 2014 18:20:01 +0100 Message-Id: <1389288003-23187-4-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1389288003-23187-1-git-send-email-maxime.ripard@free-electrons.com> References: <1389288003-23187-1-git-send-email-maxime.ripard@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140109_122525_843183_B622D09E X-CRM114-Status: UNSURE ( 8.24 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.2 (-) Cc: zhuzhenhua@allwinnertech.com, linux-sunxi@googlegroups.com, linux-i2c@vger.kernel.org, sunny@allwinnertech.com, shuge@allwinnertech.com, Maxime Ripard , duanmintao@allwinnertech.com, linux-arm-kernel@lists.infradead.org, kevin.z.m.zh@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The A31 has 4 I2C controllers that are the same than the one in the other Allwinner SoCs, except for the fact that they are asserted in reset by the reset unit. Add these i2c controllers to the DTSI. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 5256ad9..7dac496 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -312,6 +312,46 @@ status = "disabled"; }; + i2c0: i2c@01c2ac00 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2ac00 0x400>; + interrupts = <0 6 4>; + clocks = <&apb2_gates 0>; + clock-frequency = <100000>; + resets = <&apb2_rst 0>; + status = "disabled"; + }; + + i2c1: i2c@01c2b000 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b000 0x400>; + interrupts = <0 7 4>; + clocks = <&apb2_gates 1>; + clock-frequency = <100000>; + resets = <&apb2_rst 1>; + status = "disabled"; + }; + + i2c2: i2c@01c2b400 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b400 0x400>; + interrupts = <0 8 4>; + clocks = <&apb2_gates 2>; + clock-frequency = <100000>; + resets = <&apb2_rst 2>; + status = "disabled"; + }; + + i2c3: i2c@01c2b800 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b800 0x400>; + interrupts = <0 9 4>; + clocks = <&apb2_gates 3>; + clock-frequency = <100000>; + resets = <&apb2_rst 3>; + status = "disabled"; + }; + gic: interrupt-controller@01c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>,