From patchwork Mon Jan 13 15:04:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taras Kondratiuk X-Patchwork-Id: 3476641 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7A44F9F2E9 for ; Mon, 13 Jan 2014 15:05:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 63856200F2 for ; Mon, 13 Jan 2014 15:05:43 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2FBD5200E5 for ; Mon, 13 Jan 2014 15:05:42 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W2j4T-0007Ev-Qp; Mon, 13 Jan 2014 15:04:58 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W2j4E-0001jo-TT; Mon, 13 Jan 2014 15:04:42 +0000 Received: from mail-ee0-f45.google.com ([74.125.83.45]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W2j4B-0001hD-5u for linux-arm-kernel@lists.infradead.org; Mon, 13 Jan 2014 15:04:40 +0000 Received: by mail-ee0-f45.google.com with SMTP id d49so3155780eek.18 for ; Mon, 13 Jan 2014 07:04:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=/AOw17KEZIVuUx+D1hLxEFW5rU1DO/TOop4ebvGCqg4=; b=fNVXH+0hWJ7XcOD2FRpAMVV/TnVll7E2tqktuq4FEI7f2sxKKZw4BYE8TZLGmBj4ek X3Zq6sDQrxphrPMLBtUFfayYnMi8w961jWRObfv3Oy32RJmn38als8V8/ZtKo1NB3Aqo amzdBpw9+vsyHhEv4sOJuLXmsw0+4RQTV51Hp9t5DA/c6lFF7Vd49ub93BfvGNE5/zYS +Kk409yciJNaBXr3B2JwiY+Od8ejMDNHbvC3V9XLG17MJALek5sRYRraV9E9YJ/2AZV+ PPY/G3pLMk66x6JY1aUR5qNvquAczOy0c3lp8CNGE8V5FSm4YvDjz5TmKUgh6y4U+I8F u4+g== X-Gm-Message-State: ALoCoQmYN7Q+7KrAvoyxRvuTFPksLsjYR2uyN44F/arlX90gNiYSbDo1Rf0gvcXbTBnaA5YCvFj+ X-Received: by 10.14.212.69 with SMTP id x45mr28603058eeo.69.1389625452735; Mon, 13 Jan 2014 07:04:12 -0800 (PST) Received: from condor-x220.synapse.com ([195.238.93.36]) by mx.google.com with ESMTPSA id o13sm40509532eex.19.2014.01.13.07.04.11 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 13 Jan 2014 07:04:12 -0800 (PST) From: Taras Kondratiuk To: Tero Kristo Subject: [PATCH] ARM: OMAP4: sleep/smp: switch CPU to BE if compiled for BE Date: Mon, 13 Jan 2014 17:04:06 +0200 Message-Id: <1389625447-24132-1-git-send-email-taras.kondratiuk@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140113_100439_359112_29B51E0A X-CRM114-Status: GOOD ( 12.77 ) X-Spam-Score: -2.6 (--) Cc: linaro-kernel@lists.linaro.org, Russell King , Victor Kamensky , Tony Lindgren , Taras Kondratiuk , patches@linaro.org, linux-kernel@vger.kernel.org, linaro-networking@linaro.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Victor Kamensky If kernel operates in BE mode on device that has LE bootloader/ROM code, we need to switch CPU to operate in BE mode before it will start to access BE data. Generic secondary_startup function that is called from OMAP specific secondary startup code will do the switch, but we need to do it earlier because OMAP's secondary_startup code works with BE data. Signed-off-by: Victor Kamensky Signed-off-by: Taras Kondratiuk --- This is a part of RFC series [1]. Based on v3.13-rc8. [1] http://www.spinics.net/lists/linux-omap/msg99927.html arch/arm/mach-omap2/omap-headsmp.S | 13 +++++++++++++ arch/arm/mach-omap2/sleep44xx.S | 6 ++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S index 75e9295..75c98d4 100644 --- a/arch/arm/mach-omap2/omap-headsmp.S +++ b/arch/arm/mach-omap2/omap-headsmp.S @@ -17,6 +17,7 @@ #include #include +#include #include "omap44xx.h" @@ -58,6 +59,12 @@ hold: ldr r12,=0x103 bne hold /* + * ROM code operates in little endian mode, when we get control we + * need to switch it back to big endian mode. + */ +ARM_BE8(setend be) + + /* * we've been released from the wait loop,secondary_stack * should now contain the SVC stack for this core */ @@ -75,6 +82,12 @@ hold_2: ldr r12,=0x103 bne hold_2 /* + * ROM code operates in little endian mode, when we get control we + * need to switch it back to big endian mode. + */ +ARM_BE8(setend be) + + /* * GIC distributor control register has changed between * CortexA9 r1pX and r2pX. The Control Register secure * banked version is now composed of 2 bits: diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S index 9086ce0..e556c8b 100644 --- a/arch/arm/mach-omap2/sleep44xx.S +++ b/arch/arm/mach-omap2/sleep44xx.S @@ -249,6 +249,12 @@ ENDPROC(omap4_finish_suspend) */ ENTRY(omap4_cpu_resume) /* + * ROM code operates in little endian mode, when we get control we + * need to switch it back to big endian mode. + */ +ARM_BE8(setend be) + + /* * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device. * OMAP44XX EMU/HS devices - CPU0 SMP bit access is enabled in PPA * init and for CPU1, a secure PPA API provided. CPU0 must be ON