From patchwork Tue Jan 14 10:51:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas KANDAGATLA X-Patchwork-Id: 3485141 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C19479F381 for ; Tue, 14 Jan 2014 10:59:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A02DE201F9 for ; Tue, 14 Jan 2014 10:59:35 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 099AB201F7 for ; Tue, 14 Jan 2014 10:59:34 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W31ha-0004lk-UZ; Tue, 14 Jan 2014 10:58:35 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W31hO-00086x-WD; Tue, 14 Jan 2014 10:58:23 +0000 Received: from eu1sys200aog108.obsmtp.com ([207.126.144.125]) by merlin.infradead.org with smtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W31gz-000823-NQ for linux-arm-kernel@lists.infradead.org; Tue, 14 Jan 2014 10:58:03 +0000 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob108.postini.com ([207.126.147.11]) with SMTP ID DSNKUtUYCpT7SZnp9UY17RIuoY3UY820o6gf@postini.com; Tue, 14 Jan 2014 10:57:57 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5AA9097; Tue, 14 Jan 2014 10:56:23 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BD94A159A7; Tue, 14 Jan 2014 10:43:21 +0000 (GMT) Received: from localhost (10.65.51.147) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.123.3; Tue, 14 Jan 2014 11:57:08 +0100 From: Srinivas Kandagatla To: Subject: [PATCH v1 4/6] drivers: reset: stih415: add softreset controller Date: Tue, 14 Jan 2014 10:51:37 +0000 Message-ID: <1389696697-19862-1-git-send-email-srinivas.kandagatla@st.com> X-Mailer: git-send-email 1.7.6.5 In-Reply-To: <1389696613-19683-1-git-send-email-srinivas.kandagatla@st.com> References: <1389696613-19683-1-git-send-email-srinivas.kandagatla@st.com> MIME-Version: 1.0 X-Originating-IP: [10.65.51.147] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140114_055758_332657_243680DA X-CRM114-Status: GOOD ( 20.15 ) X-Spam-Score: -4.2 (----) Cc: Mark Rutland , devicetree@vger.kernel.org, Russell King , kernel@stlinux.com, Pawel Moll , Ian Campbell , Srinivas Kandagatla , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, stephen.gallimore@st.com, Stuart Menefy , Rob Herring , Rob Landley , Kumar Gala , Grant Likely , lee.jones@linaro.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds softreset controller for STiH415 SOC, soft reset controller is based on system configuration registers which are mapped via regmap. This reset controller does not have any feedback or acknowledgement. With this patch a new device "st,stih415-softreset" is registered with system configuration registers based reset controller that controls the softreset state of the hardware such as Ethernet, IRB. Signed-off-by: Srinivas Kandagatla --- .../devicetree/bindings/reset/st,sti-softreset.txt | 45 ++++++++++++++++++++ arch/arm/boot/dts/stih415.dtsi | 5 ++ drivers/reset/sti/reset-stih415.c | 22 ++++++++++ .../dt-bindings/reset-controller/stih415-resets.h | 4 ++ 4 files changed, 76 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/st,sti-softreset.txt diff --git a/Documentation/devicetree/bindings/reset/st,sti-softreset.txt b/Documentation/devicetree/bindings/reset/st,sti-softreset.txt new file mode 100644 index 0000000..b2df262 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/st,sti-softreset.txt @@ -0,0 +1,45 @@ +STMicroelectronics STi family Sysconfig Peripheral SoftReset Controller +============================================================================= + +This binding describes a reset controller device that is used to enable and +disable on-chip peripheral controllers such as USB and SATA, using +"softreset" control bits found in the STi family SoC system configuration +registers. + +The actual action taken when softreset is asserted is hardware dependent. +However, when asserted it may not be possible to access the hardware's +registers and after an assert/deassert sequence the hardware's previous state +may no longer be valid. + +Please refer to reset.txt in this directory for common reset +controller binding usage. + +Required properties: +- compatible: Should be "st,-softreset" +- #reset-cells: 1, see below + +example: + + softreset: softreset-controller { + #reset-cells = <1>; + compatible = "st,stih415-softreset"; + }; + + +Specifying softreset control of devices +======================================= + +Device nodes should specify the reset channel required in their "resets" +property, containing a phandle to the softreset device node and an +index specifying which channel to use, as described in reset.txt + +example: + + ethernet0{ + resets = <&softreset STIH415_ETH0_SOFTRESET>; + }; + +Macro definitions for the supported reset channels can be found in: + +include/dt-bindings/reset-controller/stih415-resets.h +include/dt-bindings/reset-controller/stih416-resets.h diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi index 19e29f4..d52207c 100644 --- a/arch/arm/boot/dts/stih415.dtsi +++ b/arch/arm/boot/dts/stih415.dtsi @@ -34,6 +34,11 @@ compatible = "st,stih415-powerdown"; }; + softreset: softreset-controller { + #reset-cells = <1>; + compatible = "st,stih415-softreset"; + }; + syscfg_sbc: sbc-syscfg@fe600000{ compatible = "st,stih415-sbc-syscfg", "syscon"; reg = <0xfe600000 0xb4>; diff --git a/drivers/reset/sti/reset-stih415.c b/drivers/reset/sti/reset-stih415.c index 56c2146..fce5153 100644 --- a/drivers/reset/sti/reset-stih415.c +++ b/drivers/reset/sti/reset-stih415.c @@ -37,6 +37,10 @@ static const char stih415_lpm[] = "st,stih415-lpm-syscfg"; #define SYSCFG_336 0x90 /* Powerdown request USB/SATA/PCIe */ #define SYSSTAT_384 0x150 /* Powerdown status USB/SATA/PCIe */ +#define SYSCFG_166 0x108 /* Softreset Ethernet 0 */ +#define SYSCFG_31 0x7c /* Softreset Ethernet 1 */ +#define LPM_SYSCFG_1 0x4 /* Softreset IRB */ + static const struct syscfg_reset_channel_data stih415_powerdowns[] = { [STIH415_EMISS_POWERDOWN] = STIH415_PDN_FRONT(0), [STIH415_NAND_POWERDOWN] = STIH415_PDN_FRONT(1), @@ -49,15 +53,33 @@ static const struct syscfg_reset_channel_data stih415_powerdowns[] = { [STIH415_PCIE_POWERDOWN] = STIH415_PDN_REAR(5, 8), }; +static const struct syscfg_reset_channel_data stih415_softresets[] = { + [STIH415_ETH0_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih415_front, + SYSCFG_166, 0), + [STIH415_ETH1_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih415_sbc, + SYSCFG_31, 0), + [STIH415_IRB_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih415_lpm, + LPM_SYSCFG_1, 6), +}; + static struct syscfg_reset_controller_data stih415_powerdown_controller = { .wait_for_ack = true, .nr_channels = ARRAY_SIZE(stih415_powerdowns), .channels = stih415_powerdowns, }; +static struct syscfg_reset_controller_data stih415_softreset_controller = { + .wait_for_ack = false, + .active_low = true, + .nr_channels = ARRAY_SIZE(stih415_softresets), + .channels = stih415_softresets, +}; + static struct of_device_id stih415_reset_match[] = { { .compatible = "st,stih415-powerdown", .data = &stih415_powerdown_controller, }, + { .compatible = "st,stih415-softreset", + .data = &stih415_softreset_controller, }, {}, }; diff --git a/include/dt-bindings/reset-controller/stih415-resets.h b/include/dt-bindings/reset-controller/stih415-resets.h index 2d54e68..825ed41 100644 --- a/include/dt-bindings/reset-controller/stih415-resets.h +++ b/include/dt-bindings/reset-controller/stih415-resets.h @@ -16,4 +16,8 @@ #define STIH415_SATA1_POWERDOWN 7 #define STIH415_PCIE_POWERDOWN 8 +#define STIH415_ETH0_SOFTRESET 0 +#define STIH415_ETH1_SOFTRESET 1 +#define STIH415_IRB_SOFTRESET 2 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */