@@ -33,6 +33,11 @@
compatible = "st,stih416-powerdown";
};
+ softreset: softreset-controller {
+ #reset-cells = <1>;
+ compatible = "st,stih416-softreset";
+ };
+
syscfg_sbc:sbc-syscfg@fe600000{
compatible = "st,stih416-sbc-syscfg", "syscon";
reg = <0xfe600000 0x1000>;
@@ -37,6 +37,10 @@ static const char stih416_lpm[] = "st,stih416-lpm-syscfg";
#define SYSCFG_2525 0x834 /* Powerdown request USB/SATA/PCIe */
#define SYSSTAT_2583 0x91c /* Powerdown status USB/SATA/PCIe */
+#define SYSCFG_1539 0x86c /* Softreset Ethernet 0 */
+#define SYSCFG_510 0x7f8 /* Softreset Ethernet 1 */
+#define LPM_SYSCFG_1 0x4 /* Softreset IRB */
+
static const struct syscfg_reset_channel_data stih416_powerdowns[] = {
[STIH416_EMISS_POWERDOWN] = STIH416_PDN_FRONT(0),
[STIH416_NAND_POWERDOWN] = STIH416_PDN_FRONT(1),
@@ -51,15 +55,33 @@ static const struct syscfg_reset_channel_data stih416_powerdowns[] = {
[STIH416_PCIE1_POWERDOWN] = STIH416_PDN_REAR(5, 8),
};
+static const struct syscfg_reset_channel_data stih416_softresets[] = {
+ [STIH416_ETH0_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih416_front,
+ SYSCFG_1539, 0),
+ [STIH416_ETH1_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih416_sbc,
+ SYSCFG_510, 0),
+ [STIH416_IRB_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih416_lpm,
+ LPM_SYSCFG_1, 6),
+};
+
static struct syscfg_reset_controller_data stih416_powerdown_controller = {
.wait_for_ack = true,
.nr_channels = ARRAY_SIZE(stih416_powerdowns),
.channels = stih416_powerdowns,
};
+static struct syscfg_reset_controller_data stih416_softreset_controller = {
+ .wait_for_ack = false,
+ .active_low = true,
+ .nr_channels = ARRAY_SIZE(stih416_softresets),
+ .channels = stih416_softresets,
+};
+
static struct of_device_id stih416_reset_match[] = {
{ .compatible = "st,stih416-powerdown",
.data = &stih416_powerdown_controller, },
+ { .compatible = "st,stih416-softreset",
+ .data = &stih416_softreset_controller, },
{},
};
@@ -18,4 +18,8 @@
#define STIH416_PCIE0_POWERDOWN 9
#define STIH416_PCIE1_POWERDOWN 10
+#define STIH416_ETH0_SOFTRESET 0
+#define STIH416_ETH1_SOFTRESET 1
+#define STIH416_IRB_SOFTRESET 2
+
#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */
This patch adds softreset controller for STiH416 SOC, soft reset controller is based on system configuration registers which are mapped via regmap. This reset controller does not have any feedback or acknowledgement. With this patch a new device "st,stih416-softreset" is registered with system configuration registers based reset controller that controls the softreset state of the hardware such as Ethernet, IRB. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> --- arch/arm/boot/dts/stih416.dtsi | 5 ++++ drivers/reset/sti/reset-stih416.c | 22 ++++++++++++++++++++ .../dt-bindings/reset-controller/stih416-resets.h | 4 +++ 3 files changed, 31 insertions(+), 0 deletions(-)