From patchwork Sat Jan 25 16:43:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 3537201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id ABE739F2E9 for ; Sat, 25 Jan 2014 16:50:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BC0EB20181 for ; Sat, 25 Jan 2014 16:49:58 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 81BD020179 for ; Sat, 25 Jan 2014 16:49:57 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W76Ow-0006iq-Jy; Sat, 25 Jan 2014 16:48:11 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W76OX-0003dB-0j; Sat, 25 Jan 2014 16:47:45 +0000 Received: from am1ehsobe006.messaging.microsoft.com ([213.199.154.209] helo=am1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W76Nu-0003Xk-9F for linux-arm-kernel@lists.infradead.org; Sat, 25 Jan 2014 16:47:10 +0000 Received: from mail7-am1-R.bigfish.com (10.3.201.226) by AM1EHSOBE025.bigfish.com (10.3.207.147) with Microsoft SMTP Server id 14.1.225.22; Sat, 25 Jan 2014 16:46:44 +0000 Received: from mail7-am1 (localhost [127.0.0.1]) by mail7-am1-R.bigfish.com (Postfix) with ESMTP id 3EBB51C014D; Sat, 25 Jan 2014 16:46:44 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(z3e12hzc89bhc8kzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah21bch1fc6hzz1de098h8275bh8275dh1de097hz2dh87h2a8h839h93fhd24he5bhf0ah1288h12a5h12a9h12bdh137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h24afh2327h2336h2438h2461h2487h24d7h1151h1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail7-am1 (localhost.localdomain [127.0.0.1]) by mail7-am1 (MessageSwitch) id 1390668402700465_23157; Sat, 25 Jan 2014 16:46:42 +0000 (UTC) Received: from AM1EHSMHS002.bigfish.com (unknown [10.3.201.230]) by mail7-am1.bigfish.com (Postfix) with ESMTP id A5F24380051; Sat, 25 Jan 2014 16:46:42 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS002.bigfish.com (10.3.207.102) with Microsoft SMTP Server (TLS) id 14.16.227.3; Sat, 25 Jan 2014 16:46:38 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.3.158.2; Sat, 25 Jan 2014 16:46:36 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.238]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s0PGk7uP013196; Sat, 25 Jan 2014 09:46:33 -0700 From: Shawn Guo To: Rob Herring , Subject: =?UTF-8?q?=5BPATCH=206/9=5D=20ARM=3A=20dts=3A=20imx35=3A=20remove=20the=20use=20of=20pingrp=20macros?= Date: Sun, 26 Jan 2014 00:43:08 +0800 Message-ID: <1390668191-20289-7-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1390668191-20289-1-git-send-email-shawn.guo@linaro.org> References: <1390668191-20289-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140125_114706_620406_C3DB52BC X-CRM114-Status: GOOD ( 13.24 ) X-Spam-Score: -1.9 (-) Cc: devicetree@vger.kernel.org, Shawn Guo , Russell King - ARM Linux , linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We created the pingrp macros in imx35-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx35-pingrp.h | 104 -------------------------------------- arch/arm/boot/dts/imx35.dtsi | 1 - 2 files changed, 105 deletions(-) delete mode 100644 arch/arm/boot/dts/imx35-pingrp.h diff --git a/arch/arm/boot/dts/imx35-pingrp.h b/arch/arm/boot/dts/imx35-pingrp.h deleted file mode 100644 index 2406e7e..0000000 --- a/arch/arm/boot/dts/imx35-pingrp.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright 2013 Eukréa Electromatique - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __DTS_IMX35_PINGRP_H -#define __DTS_IMX35_PINGRP_H - -#define MX35_AUDMUX_PINGRP1 \ - MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000 \ - MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000 \ - MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000 \ - MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000 - -#define MX35_CAN1_PINGRP1 \ - MX35_PAD_I2C2_CLK__CAN1_TXCAN 0x1c0 \ - MX35_PAD_I2C2_DAT__CAN1_RXCAN 0x1c0 - -#define MX35_CAN2_PINGRP1 \ - MX35_PAD_TX5_RX0__CAN2_TXCAN 0x1c0 \ - MX35_PAD_TX4_RX1__CAN2_RXCAN 0x1c0 - -#define MX35_ESDHC1_PINGRP1 \ - MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 \ - MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 \ - MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 \ - MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 \ - MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 \ - MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 - -#define MX35_FEC_PINGRP1 \ - MX35_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 \ - MX35_PAD_FEC_RX_CLK__FEC_RX_CLK 0x80000000 \ - MX35_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 \ - MX35_PAD_FEC_COL__FEC_COL 0x80000000 \ - MX35_PAD_FEC_RDATA0__FEC_RDATA_0 0x80000000 \ - MX35_PAD_FEC_TDATA0__FEC_TDATA_0 0x80000000 \ - MX35_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 \ - MX35_PAD_FEC_MDC__FEC_MDC 0x80000000 \ - MX35_PAD_FEC_MDIO__FEC_MDIO 0x80000000 \ - MX35_PAD_FEC_TX_ERR__FEC_TX_ERR 0x80000000 \ - MX35_PAD_FEC_RX_ERR__FEC_RX_ERR 0x80000000 \ - MX35_PAD_FEC_CRS__FEC_CRS 0x80000000 \ - MX35_PAD_FEC_RDATA1__FEC_RDATA_1 0x80000000 \ - MX35_PAD_FEC_TDATA1__FEC_TDATA_1 0x80000000 \ - MX35_PAD_FEC_RDATA2__FEC_RDATA_2 0x80000000 \ - MX35_PAD_FEC_TDATA2__FEC_TDATA_2 0x80000000 \ - MX35_PAD_FEC_RDATA3__FEC_RDATA_3 0x80000000 \ - MX35_PAD_FEC_TDATA3__FEC_TDATA_3 0x80000000 - -#define MX35_I2C1_PINGRP1 \ - MX35_PAD_I2C1_CLK__I2C1_SCL 0x80000000 \ - MX35_PAD_I2C1_DAT__I2C1_SDA 0x80000000 - -#define MX35_I2C3_PINGRP1 \ - MX35_PAD_ATA_DATA12__I2C3_SCL 0x80000000 \ - MX35_PAD_ATA_DATA13__I2C3_SDA 0x80000000 - -#define MX35_IPU_PINGRP1 \ - MX35_PAD_LD0__IPU_DISPB_DAT_0 0x80000000 \ - MX35_PAD_LD1__IPU_DISPB_DAT_1 0x80000000 \ - MX35_PAD_LD2__IPU_DISPB_DAT_2 0x80000000 \ - MX35_PAD_LD3__IPU_DISPB_DAT_3 0x80000000 \ - MX35_PAD_LD4__IPU_DISPB_DAT_4 0x80000000 \ - MX35_PAD_LD5__IPU_DISPB_DAT_5 0x80000000 \ - MX35_PAD_LD6__IPU_DISPB_DAT_6 0x80000000 \ - MX35_PAD_LD7__IPU_DISPB_DAT_7 0x80000000 \ - MX35_PAD_LD8__IPU_DISPB_DAT_8 0x80000000 \ - MX35_PAD_LD9__IPU_DISPB_DAT_9 0x80000000 \ - MX35_PAD_LD10__IPU_DISPB_DAT_10 0x80000000 \ - MX35_PAD_LD11__IPU_DISPB_DAT_11 0x80000000 \ - MX35_PAD_LD12__IPU_DISPB_DAT_12 0x80000000 \ - MX35_PAD_LD13__IPU_DISPB_DAT_13 0x80000000 \ - MX35_PAD_LD14__IPU_DISPB_DAT_14 0x80000000 \ - MX35_PAD_LD15__IPU_DISPB_DAT_15 0x80000000 \ - MX35_PAD_LD16__IPU_DISPB_DAT_16 0x80000000 \ - MX35_PAD_LD17__IPU_DISPB_DAT_17 0x80000000 \ - MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC 0x80000000 \ - MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK 0x80000000 \ - MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY 0x80000000 \ - MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC 0x80000000 \ - MX35_PAD_CONTRAST__IPU_DISPB_CONTR 0x80000000 - -#define MX35_UART1_PINGRP1 \ - MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 \ - MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 - -#define MX35_UART1_RTSCTS_PINGRP1 \ - MX35_PAD_CTS1__UART1_CTS 0x1c5 \ - MX35_PAD_RTS1__UART1_RTS 0x1c5 - -#define MX35_UART2_PINGRP1 \ - MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5 \ - MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5 - -#define MX35_UART2_RTSCTS_PINGRP1 \ - MX35_PAD_RTS2__UART2_RTS 0x1c5 \ - MX35_PAD_CTS2__UART2_CTS 0x1c5 - -#endif /* __DTS_IMX35_PINGRP_H */ diff --git a/arch/arm/boot/dts/imx35.dtsi b/arch/arm/boot/dts/imx35.dtsi index a198b92..88b218f 100644 --- a/arch/arm/boot/dts/imx35.dtsi +++ b/arch/arm/boot/dts/imx35.dtsi @@ -10,7 +10,6 @@ #include "skeleton.dtsi" #include "imx35-pinfunc.h" -#include "imx35-pingrp.h" / { aliases {