Message ID | 1390935112-28465-1-git-send-email-cov@codeaurora.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Hi Christopher, On Tue, Jan 28, 2014 at 06:51:51PM +0000, Christopher Covington wrote: > Add the trivial support necessary to get hardware breakpoints > working for GDB on ARMv8 simulators running in AArch32 mode. > > Acked-by: Will Deacon <will.deacon@arm.com> > Signed-off-by: Christopher Covington <cov@codeaurora.org> > --- > > v3: assume for now that ARMv9 and later will update FSR Please can you stick this into the patch system? I don't have any other hw_breakpoint changes queued, so I doubt I'll send a pull for 3.15. Cheers, Will
Hi Will, On 01/29/2014 05:57 AM, Will Deacon wrote: > Hi Christopher, > > On Tue, Jan 28, 2014 at 06:51:51PM +0000, Christopher Covington wrote: >> Add the trivial support necessary to get hardware breakpoints >> working for GDB on ARMv8 simulators running in AArch32 mode. >> >> Acked-by: Will Deacon <will.deacon@arm.com> >> Signed-off-by: Christopher Covington <cov@codeaurora.org> >> --- >> >> v3: assume for now that ARMv9 and later will update FSR > > Please can you stick this into the patch system? I don't have any other > hw_breakpoint changes queued, so I doubt I'll send a pull for 3.15. Thanks for your review. Sounds good; will do. Regards, Christopher
diff --git a/arch/arm/include/asm/hw_breakpoint.h b/arch/arm/include/asm/hw_breakpoint.h index eef55ea..8e427c7 100644 --- a/arch/arm/include/asm/hw_breakpoint.h +++ b/arch/arm/include/asm/hw_breakpoint.h @@ -51,6 +51,7 @@ static inline void decode_ctrl_reg(u32 reg, #define ARM_DEBUG_ARCH_V7_ECP14 3 #define ARM_DEBUG_ARCH_V7_MM 4 #define ARM_DEBUG_ARCH_V7_1 5 +#define ARM_DEBUG_ARCH_V8 6 /* Breakpoint */ #define ARM_BREAKPOINT_EXECUTE 0 diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 3d44660..9da35c6 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -167,7 +167,7 @@ static int debug_arch_supported(void) /* Can we determine the watchpoint access type from the fsr? */ static int debug_exception_updates_fsr(void) { - return 0; + return get_debug_arch() >= ARM_DEBUG_ARCH_V8; } /* Determine number of WRP registers available. */ @@ -257,6 +257,7 @@ static int enable_monitor_mode(void) break; case ARM_DEBUG_ARCH_V7_ECP14: case ARM_DEBUG_ARCH_V7_1: + case ARM_DEBUG_ARCH_V8: ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN)); isb(); break;