| Message ID | 1391269576-13274-1-git-send-email-maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sat, Feb 01, 2014 at 04:46:16PM +0100, Maxime Ripard wrote: > The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The > GIC can work on several interrupt triggers, and the A20 was actually setting it > up to use a rising edge as a trigger, while it was actually a level high > trigger, leading to some interrupts that would be completely ignored if the > edge was missed. > > Fix this for the remaining DT nodes that slipped through. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > Cc: stable@vger.kernel.org Merged in sunxi/fixes-for-3.14. Maxime
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 119f066..2374f5a 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -454,7 +454,7 @@ rtc: rtc@01c20d00 { compatible = "allwinner,sun7i-a20-rtc"; reg = <0x01c20d00 0x20>; - interrupts = <0 24 1>; + interrupts = <0 24 4>; }; sid: eeprom@01c23800 { @@ -596,10 +596,10 @@ hstimer@01c60000 { compatible = "allwinner,sun7i-a20-hstimer"; reg = <0x01c60000 0x1000>; - interrupts = <0 81 1>, - <0 82 1>, - <0 83 1>, - <0 84 1>; + interrupts = <0 81 4>, + <0 82 4>, + <0 83 4>, + <0 84 4>; clocks = <&ahb_gates 28>; };
The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The GIC can work on several interrupt triggers, and the A20 was actually setting it up to use a rising edge as a trigger, while it was actually a level high trigger, leading to some interrupts that would be completely ignored if the edge was missed. Fix this for the remaining DT nodes that slipped through. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: stable@vger.kernel.org --- arch/arm/boot/dts/sun7i-a20.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)